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266 Commits
Author SHA1 Message Date
Unknown W. Brackets 2d25d1eb05 Add a way to force alignment in JitSafeMem(). 2013-07-04 15:59:12 -07:00
Unknown W. Brackets 942d50d521 When hitting go on a memcheck, also skip it. 
If you hit go you most likely want it to continue past the instruction you
were on.
 2013-06-30 16:35:48 -07:00
Unknown W. Brackets 8ee88ae5a2 Don't skip memcheck'd op when illegal reads is off. 2013-06-30 16:35:48 -07:00
Unknown W. Brackets 9209a30d9b Add skeleton for conditional breakpoints. 2013-06-30 16:35:47 -07:00
Unknown W. Brackets 6bd4383a8a Give memchecks/breakpoints a consistent interface. 
Removes the limit on max breakpoints, and makes everything use accessors
for both that look roughly the same.
 2013-06-30 15:16:58 -07:00
Unknown W. Brackets 84f65dc961 Save flags around conditional breakpoint check. 2013-06-29 11:45:29 -07:00
Unknown W. Brackets 609f8d6340 Allow hitting Go on a breakpoint to continue. 
Doesn't work for branches though, because of delay slots.
 2013-06-29 11:23:24 -07:00
Unknown W. Brackets aaafd372e9 Clear temp breakpoints off the CPU thread. 
This should make it possible to actually clear them.  Fixes #2519.
 2013-06-29 10:54:33 -07:00
Unknown W. Brackets 2cd8f928a7 Just disable the this constructor warning here. 2013-05-31 23:14:27 -07:00
Henrik Rydgard 2a39a3b972 JIT: Get rid of one memory access per dispatch, and get rid of blockcodepointers. 2013-04-27 01:32:03 +02:00
Henrik Rydgard 8a904fe478 Some JIT cleanup 2013-04-27 01:32:02 +02:00
Henrik Rydgard e3fb88de68 Background thread for icon loading, show in game list. Switch to GNU STL in Android port. 2013-04-13 21:24:07 +02:00
Henrik Rydgard 724a600381 Buildfix android, misc other fixes, some include cleanup 2013-03-29 20:55:32 +01:00
Unknown W. Brackets 9cf2bcd06c Fix register memcheck to respect offset. 2013-03-09 09:01:23 -08:00
Unknown W. Brackets d051ea3106 Flush when checking for memcheck coreStates. 
Trouble is this has to be done outside the lock.  So, moved out.
 2013-03-09 02:41:50 -08:00
Unknown W. Brackets a926ef6776 Respect read/write only mem breakpoints in x86 jit. 2013-03-09 02:41:49 -08:00
Unknown W. Brackets 15ff927d4d And now the dynamic memory breakpoints in x86 jit. 
And add notes that this is interpreter/HLE only for now.
 2013-03-09 02:41:49 -08:00
Unknown W. Brackets 68aaac25c6 Use unsigned compares in slowmem x86 jit. 2013-03-09 02:41:48 -08:00
Unknown W. Brackets d10bdd6938 Basic working imm mem breakpoints in x86 jit. 
Seems to work okay.  Doen't cover HLE of course.
 2013-03-09 02:41:48 -08:00
Unknown W. Brackets 6290b67984 Validate the full memory access is valid. 
Probably barely matters, but since we have the size now anyway...
 2013-03-09 02:41:47 -08:00
Unknown W. Brackets 4908fb8046 Don't trip in a delay slot for bad mem access. 
Could've done some tricky things... we don't jump correctly then.
 2013-03-09 02:41:47 -08:00
Unknown W. Brackets 2d6a730cac Add some basics for memory checks to x86 jit. 
Specifically, we will need to be able to bail in delayslots,
and we will need to know the size of the access (useful anyway.)
 2013-03-09 02:41:46 -08:00
Unknown W. Brackets c4ab0855b4 Make sure interpreter and jit savestates match. 2013-03-08 08:49:21 -08:00
Unknown W. Brackets 3fbb5d4388 Avoid using CALL() directly in case of far calls. 
This mainly matters for x64.
 2013-02-24 00:12:55 -08:00
Unknown W. Brackets 7eb9af271b Fix downcount check without fastmem in jr. 2013-02-23 14:30:24 -08:00
Unknown W. Brackets 2164a7fdf9 Keep track of whether we're in the runloop or not. 2013-02-23 13:01:00 -08:00
Unknown W. Brackets dacbcbdf2b Add a MIPSTables flag for ignoring the prefix. 2013-02-18 01:23:15 -08:00
Unknown W. Brackets afb7c0b83c Assume prefixes start default until proven wrong. 
Currently this means nothing since the MIPSTables flags are wrong.
It will blow the cache once, after the first vfpu op.
 2013-02-18 01:14:57 -08:00
Unknown W. Brackets f532951331 Automatically eat prefixes in x86 jit. 
Simplifies the code and makes it easier to know they're eaten
even for ops not yet jitted.
 2013-02-17 17:53:53 -08:00
Henrik Rydgard 909b768f47 Don't need separate variables for writemask. Some optimizations. 2013-02-16 09:28:55 +01:00
Unknown W. Brackets f95e66eb98 Forget cached prefixes when calling generic. 
It may eat them, or maybe always does?
 2013-02-15 08:35:34 -08:00
Unknown W. Brackets ccad259ae5 Keep track of VFPU prefixes and flush them in jit. 2013-02-15 08:35:33 -08:00
Henrik Rydgard 78923f5538 Jit a little more (vfpu single load/store, transfer instructions) 2013-02-10 12:14:55 +01:00
Unknown W. Brackets eb84c2f00a Validate jumps in jit slowmem mode. 
This makes it easier to see what is going on in the emulator debugger.
 2013-02-09 23:11:26 -08:00
Unknown W. Brackets 71c85ccf33 In jit slowmem, verify actual address. 
Oops, it could crash if it was near the boundary.
Well, it still could if it were very near, but that's rare.
 2013-02-09 23:08:57 -08:00
Unknown W. Brackets f777c872e6 Jit unaligned reads/writes. 
This mostly just improves perf on debug, not really on the map for release.
 2013-02-02 13:12:34 -08:00
Unknown W. Brackets 6d7a8d9b1a Apply the memview mask to jit immediates too. 2013-01-26 23:54:43 -08:00
Unknown W. Brackets a7b5433ba7 Make sure fastmem isn't confused by rs changing. 2013-01-26 23:18:50 -08:00
Unknown W. Brackets a89d61463e Make the VFPU jit use far jumps for memory access. 2013-01-26 23:08:19 -08:00
Unknown W. Brackets 0e8e9697c5 Add lv.q/sv.q support to the x86 jit. 2013-01-26 10:09:18 -08:00
Unknown W. Brackets b77ce99d01 Oops, no slow read for immediates usually. 2013-01-26 09:27:52 -08:00
Unknown W. Brackets 9cd5836b85 Rename WriteFinish() to Finish() is safe mem. 
It's nothing to do with writing.
 2013-01-26 09:09:47 -08:00
Unknown W. Brackets 3e419f513a Refactor jit safe memory reads without dup code. 
But, maybe too automagical...
 2013-01-26 08:42:34 -08:00
Henrik Rydgard 2738417040 VFPU JIT: start setting up infrastructure. very incomplete. vdot works if undisabled, but isn't complete. 2013-01-26 01:34:19 +01:00
Henrik Rydgard 68991511ee Split out the FPU reg cache into its own file too. 2013-01-26 01:34:19 +01:00
Unknown W. Brackets 2eba209f64 Move around the jit nice delay slot logic. 
Nice delay slots don't not save flags, they run before the CMP.
 2013-01-24 07:31:51 -08:00
Unknown W. Brackets 0e33923844 Belt and suspenders check for branch ops. 2013-01-22 08:11:37 -08:00
Unknown W. Brackets a9d0390426 Adjust downcount before syscalls, not after. 
This makes jit slightly slower for syscalls, but it's minor and makes
sure jit and interpreter timing are determistically the same.
 2013-01-21 22:57:53 -08:00
Unknown W. Brackets 566b7a0910 A branch was missing inDelaySlot, refactor it. 2013-01-21 22:45:07 -08:00
Unknown W. Brackets c897e6446a Don't over decr downcount when hitting a jit bp. 2013-01-21 19:41:12 -08:00