2797cfca56
Remove more vestiges of old experiments
2026-02-12 01:23:48 +01:00
e01ca5b057
Logging API change (refactor) ( #19324 )
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* Rename LogType to Log
* Explicitly use the Log:: enum when logging. Allows for autocomplete when editing.
* Mac/ARM64 buildfix
* Do the same with the hle result log macros
* Rename the log names to mixed case while at it.
* iOS buildfix
* Qt buildfix attempt, ARM32 buildfix
2024-07-14 14:42:59 +02:00
cae0815095
jit: Avoid using mips identifier directly.
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Apparently this gets defined on mips systems.
2021-02-26 07:24:58 -08:00
8c3552de74
cmake: Detect features at compile time
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Instead of relying on manually passed down flags from CMake,
we now have ppsspp_config.h file to create the platform defines for us.
This improves support for multiplatform builds (such as iOS).
2016-10-19 12:31:19 +02:00
db3dffb44d
arm64: Oops, fix flushing zero from an armreg.
2015-07-05 11:57:18 -07:00
003668fe66
armjit: Fix discarding imms.
2015-07-04 07:30:32 -07:00
e6a7ba3fae
arm64: Bring imms along for the STP ride.
2015-07-03 16:51:33 -07:00
2331df8c70
arm64: Try to be more consistent in ZERO handling.
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Let's keep it IMM where possible, even though we've added checks for
MIPS_REG_ZERO.
2015-07-03 10:21:24 -07:00
66adc4e695
jit: Normalize CONDITIONAL_DISABLE formatting.
2015-07-02 20:31:37 -07:00
d014d420db
Unify JitOptions across the backends.
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This is required to make ExtractIR not a member of the various backends.
2015-04-12 11:41:26 -07:00
05a8e2e35d
Some work towards being able to build two JITs together
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This will be useful for testing/debugging, but not there yet.
2014-12-13 21:13:54 +01:00
afc779a824
jit: Add IN_RT to lwl/lwr and re-enable clobbering.
2014-12-08 21:17:01 -08:00
bfe5f9276e
jit: Re-disable clobbered thing.
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No idea what's wrong...
2014-12-08 02:06:25 -08:00
7734a4c912
jit: Re-enable clobbering with movz/movn support.
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Oops, these should be the only ones that take rd "in".
2014-12-08 01:29:41 -08:00
119c1ef83e
jit: Disable clobber detection for now.
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Should still spill better. Something is wrong with flags detection, a
clobber to rd is incorrectly discarding outside a delay slot. Don't have
time now to look into it further.
2014-12-08 01:24:17 -08:00
f817d49dfb
jit: Discard clobbered registers on spill.
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If we're spilling anyway, discard rather than saving.
2014-12-07 23:08:21 -08:00
eeff110c0f
jit: Improve and unify GPR spill logic.
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Now the same logic on x86 and ARM, and handles HI/LO/etc. better.
2014-12-07 21:10:28 -08:00
9dd6bb56bb
jit: Make available js_ and jo_ in regcaches.
2014-12-07 21:07:23 -08:00
d98bde8e50
Merge the RegCache changes from the old neon-vfpu branch
2014-12-06 12:26:58 +01:00
f6f943de63
jit: MAP_NOINIT should always mean MAP_DIRTY.
2014-11-29 00:14:08 -08:00
6ce3765b12
Sailfish: More compatibility with SailFish OS. It also needs stddef where Maemo does.
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Set packaging by default for iOS with b.sh.
2014-07-24 23:20:09 +10:00
5a89c17cf0
armjit: Allow R1 in regalloc, use LR as temp.
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LR should be safe, although it may make stack traces not work within jit,
they don't really tend to work anyway.
2014-03-28 18:38:38 -07:00
c80510fb3b
MemMap should not be included in MIPS.h.
2014-03-15 10:45:39 +01:00
98fb2e0402
armjit: Refer to R11 as MEMBASEREG for clarity.
2013-11-14 23:37:48 -08:00
ef8631c57f
Cache VFPU_CTRL_CC in a register
2013-11-12 17:58:29 +01:00
f4b5e8a4c1
Merge pull request #4518 from hrydgard/fpcond
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ARMJIT: Cache fpcond in a register to avoid store/load between compare and branch
2013-11-12 01:50:16 -08:00
17074f5a7f
Cache fpcond in a register to avoid store/load between compare and branch
2013-11-12 10:33:38 +01:00
32504ed46e
armjit: Prioritize spilling regs not used soon.
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This may improve trashing.
2013-11-12 00:03:39 -08:00
1bfce12fdd
armjit: Report some unexpected situations.
2013-11-11 23:41:18 -08:00
ac5aacbd16
armjit: Spill an imm armreg back to an imm.
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We might be able to avoid the store or etc.
2013-11-11 23:39:13 -08:00
e1fffdb37a
armjit: Don't reload an armreg ptr marked noinit.
2013-11-10 16:43:38 -08:00
bc0a846475
armjit: Optimize imm addresses (could do better...)
2013-11-10 16:30:20 -08:00
c63560c0dd
armjit: Try to find imms to optimize a reg load.
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This way we skip the MOVW/MOVT and go for one op only.
2013-11-10 16:20:34 -08:00
7e46ee0b0f
armjit: Replace MOVI2R with using the regcache.
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So that it can optimize the value with existing imms.
Not actually optimizing yet.
2013-11-10 15:50:45 -08:00
d092f7dd2d
armjit: Remember reg imm values even after flush.
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This way, we can base other imm values off them, or even do imm math using
them. We can also avoid re-flushing an imm.
2013-11-10 15:50:14 -08:00
7f9cbc0f10
armjit: Minor cleanup and logging tweaks.
2013-11-10 15:12:40 -08:00
a3a061a69f
armjit: Optimize a division by a power of two.
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These really happen.
2013-11-09 08:43:53 -08:00
54168b173e
armjit: Clean up some magic numbers.
2013-11-09 08:25:08 -08:00
6038d96b46
armjit: Flush regs using STMIA where possible.
2013-11-09 08:25:07 -08:00
e686ff59bf
armjit: Allocate regs in preferred slots.
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This may allow better flushing. Not sure if these are the best regs,
but if they aren't it shouldn't really hurt.
2013-11-09 08:25:07 -08:00
cb3bb73148
armjit: Improve GPR typesafety.
2013-11-09 08:24:15 -08:00
58c39a38ee
ARM regcache: Add mechanism to keep registers converted to pointers around
2013-11-09 16:57:29 +01:00
5a95e267fb
Add an optimization to discard registers at the end of functions when possible.
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Works in some games but crashes many so hiding it for now. Do not add UI.
2013-11-08 12:43:48 +01:00
32c95af820
ARM: Some zero-register fixes
2013-11-07 15:29:13 +01:00
8c88dff5a4
More log categories, use them (and existing ones). Improve log config.
2013-09-07 22:02:55 +02:00
3b9e6243eb
Only flush the required registers on function calls (only implemented for real on ARM)
2013-07-28 22:21:43 +02:00
056ae5db44
Buildfix for Qt.
2013-07-29 00:26:36 +10:00
59644ad59b
Jit: Implement VMMUL for ARM, optimize the x86 implementation. Also add VCST.
2013-07-28 12:14:35 +02:00
76a937f489
ARMJIT Experiment: Keep downcount in a register. Needs benchmarking.
2013-07-27 17:27:26 +02:00
e355518549
Fix a bad enum compare.
2013-07-26 22:30:05 -07:00
Henrik Rydgård