6957808b97
ArmJit: Optimisation when comparing float against 0.0f
2014-07-17 05:12:43 +10:00
252100aee5
Remove outdated comment (real cause found/fixed.)
2014-06-28 16:06:10 -07:00
bc3d789c8a
x86jit: Cache the vfpu compare flags in a reg.
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Again, to match armjit.
2014-06-28 00:38:55 -07:00
d7e2c2c1d2
armjit: Oops, correctly handle plus/minus vmin/max.
2014-06-21 07:45:47 -07:00
62daf6d7c8
armjit: Fix vmin/vmax to follow the PSP's rules.
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Also the interpreter. Fixes #6107 .
2014-06-20 23:55:33 -07:00
0879d76503
VFPU: Ensure that sin(4*x) returns 0.0 (and cos 1) for all x. Fixes #2921
2014-06-15 11:03:00 +02:00
55221b5c7c
Sin/cos fix for hardfp builds.
2014-06-12 23:10:22 +10:00
5ccc227462
armjit: Minor const optimization in Comp_VV2Op.
2014-05-31 11:12:36 -07:00
df289e46a9
armjit: Use sat0/1 method from prefixes in vsat.
2014-05-31 11:12:35 -07:00
69b0b622be
armjit: Fix D-prefix sat clamp NAN handling.
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They should leave NAN alone.
2014-05-16 01:04:57 -07:00
bc32f0e0b2
armjit: Correct disabled vslt NaN handling.
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Can possibly enable?
2014-05-16 01:04:57 -07:00
086d97516d
Fix a couple ARM VFPU flags.
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Unknown's explanation:
LO means Lower (unsigned), but for floats, it means "Less than".
LT means Lower (signed), but for floats it means "Less than OR unordered".
ARM docs at http://infocenter.arm.com/help/topic/com.arm.doc.dui0068b/Chdhcfbc.html explain the following:
LE means Signed less than or equal, and for floats it means "Less than or equal, or unordered".
LS means Unsigned lower or same, but for floats, it means "Less than or equal"
2014-05-04 22:37:41 -04:00
717c1cd34e
Merge pull request #5748 from unknownbrackets/armjit-minor
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armjit: Allow R1 in regalloc, use LR as temp
2014-03-29 04:09:58 -04:00
600842d9a2
armjit: Use prefixes on vscl's T arg.
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Makes it pass one more thing in the prefixes test, but not sure exactly
how it operates. Better to have it the same as x86 and int anyway.
2014-03-29 01:00:29 -07:00
5a89c17cf0
armjit: Allow R1 in regalloc, use LR as temp.
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LR should be safe, although it may make stack traces not work within jit,
they don't really tend to work anyway.
2014-03-28 18:38:38 -07:00
c80510fb3b
MemMap should not be included in MIPS.h.
2014-03-15 10:45:39 +01:00
174b5187e6
Arm VFPU: 2-op and 3-op: map registers before work, improving instruction order a little.
2014-03-12 11:06:26 +01:00
adadf11890
An attempt to combine FPU regcache writebacks with VSTMIA. Disabled due to bugs.
2014-03-11 11:03:51 +01:00
30a6a5d10f
ARMJIT: Implement VLDM/VSTM load/store combinations and use in armjit. Also add them to disassembler.
2014-03-07 02:56:34 +10:00
2d8429ac48
Assorted cleanup in the MIPS emulation
2013-12-10 13:15:16 +01:00
0a5aa78011
ARMJit: Fix bug in instruction mtv, affecting SSX
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SSX still has other problems on ARM though.
2013-12-10 00:19:18 +01:00
245aeecbc0
ARM: Check for VFPv4 before using CVT.F32.F16 (vh2f).
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Issue #4730 might be fixed by this.
2013-12-05 22:55:31 +01:00
32f479b0a6
Assorted log spam reductions.
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Also let Java know of some important events. Not used for anything yet.
2013-12-04 17:43:00 +01:00
f696650437
Implement vasin (fastasin5 from unittest) in ARM jit, add a sanity check.
2013-12-01 14:14:04 +01:00
55500d4bb6
Reorder VFPU registers in memory so that we can flush and reload them in bulk more often.
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Doesn't actually do that yet, that's for the NEON branch.
2013-11-28 13:27:51 +01:00
e5e23f3ce1
ARM: Fix vsgn. Some vertex decoder tweaks.
2013-11-24 18:21:47 +01:00
db016f7001
ARMJIT: Disable vsgn, reported to break Miami Vice
2013-11-23 13:00:35 +01:00
bd3a03ad1d
Quick buildfix. Last commit was meant to go on a WIP branch but meh :)
2013-11-19 21:44:18 +01:00
ab3037112f
Some scaffolding for a future VFPU-on-NEON implementation
2013-11-19 21:41:48 +01:00
99af10cb09
Get rid of bool disablePrefixes in ARM build (already gone in x86)
2013-11-19 21:41:48 +01:00
dca457e6df
Optimize multiple sv.s and lv.s calls on ARM. Also some cleanup.
2013-11-19 21:41:47 +01:00
5bb3824dcf
Implement vocp on ARM and x86.
2013-11-19 21:41:47 +01:00
9f5402ce54
Use hardware half-to-float on ARM when available.
2013-11-17 14:17:13 +01:00
98fb2e0402
armjit: Refer to R11 as MEMBASEREG for clarity.
2013-11-14 23:37:48 -08:00
ef8631c57f
Cache VFPU_CTRL_CC in a register
2013-11-12 17:58:29 +01:00
df3765a320
Arm jit: optimize ES, NS conditions in vcmp. Bugfix TR.
2013-11-12 14:43:12 +01:00
7e46ee0b0f
armjit: Replace MOVI2R with using the regcache.
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So that it can optimize the value with existing imms.
Not actually optimizing yet.
2013-11-10 15:50:45 -08:00
58db79672f
Fix vmtvc on ARM, fixing issues with our prefix check. Add some logging.
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Also improve vcmp on ARM.
2013-11-08 19:59:11 +01:00
309f904c0c
Extract JitState into its own header (arm/x86)
2013-11-08 18:51:52 +01:00
f57f8170d3
ARMjit: Optimize mfv, mtv
2013-11-08 12:43:48 +01:00
6eb7f94065
Implement vsgn in x86/x64 and ARM jit
2013-11-07 15:29:13 +01:00
5613b86864
Use NEON texture decoder on Blackberry and iOS. Use ARMV7 defines.
2013-11-03 15:59:10 +10:00
e08ac100ce
Update native with workaround for #4078 and add some comments
2013-10-08 20:11:01 +02:00
04b911a03b
Change a bunch of "MayHavePrefix" to "HasUnknownPrefix".
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Should be safe, I think none of these have any sane use of prefixes anyway.
2013-09-28 20:07:58 +02:00
41a988774f
ARM: implement vhdp
2013-09-28 20:07:57 +02:00
6aecfe3998
Trying the VROT disable experiment again, this time in the right file...
2013-09-16 00:14:05 +02:00
fb48defa75
Experiment: Disable VROT on x86 32-bit except on Windows where I know it works.
2013-09-10 18:17:00 +02:00
8c88dff5a4
More log categories, use them (and existing ones). Improve log config.
2013-09-07 22:02:55 +02:00
97aa1a631e
Improve typesafety in the x86 regalloc.
2013-08-24 19:41:10 -07:00
109ad17ac6
Use a typesafe struct for opcodes.
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Also, correctly read delayslots using Read_Instruction on ARM.
2013-08-24 15:36:24 -07:00
Sacha