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run cube.elf for 8728 frames (hit BranchFPFlag)

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Ced2911 committed 2013-08-16 14:48:42 +02:00
1 parent fa49be4a82
commit fd6bbd6096
3 files changed
+38 -25
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Core/MIPS/PPC/PpcAsm.cpp
+6 -6
View File
@@ -118,7 +118,7 @@ const u8 *Jit::DoJit(u32 em_address, JitBlock *b)
//printf("DoJitend %08x - %08x - %08x\n", mips_->pc, mips_->downcount, js.compilerPC);
DumpJit();
//DumpJit();
AlignCode16();
@@ -170,7 +170,7 @@ void Jit::GenerateFixedCode() {
MOVI2R(BASEREG, (u32)Memory::base);
MOVI2R(CTXREG, (u32)mips_);
MOVI2R(CODEREG, (u32)GetBasePtr());
Break();
//Break();
// Update downcount reg value from memory
RestoreDowncount(DCNTREG);
@@ -213,7 +213,7 @@ void Jit::GenerateFixedCode() {
MOVI2R(SREG, (u32)&coreState);
// ??? Compare coreState and CORE_RUNNING
LWZ(SREG, SREG); // SREG = *SREG
CMPLI(SREG, 0); // compare 0(CORE_RUNNING) and CR0
CMPI(SREG, 0); // compare 0(CORE_RUNNING) and CR0
// branch to badCoreState: (jump if coreState != CORE_RUNNING)
FixupBranch badCoreState = BNE(); // B_CC(CC_NEQ)
@@ -267,7 +267,7 @@ void Jit::GenerateFixedCode() {
// compare, op == MIPS_EMUHACK_OPCODE
MOVI2R(SREG, MIPS_EMUHACK_OPCODE);
CMP(R3, SREG);
CMPL(R3, SREG);
// Branch if func block not found
FixupBranch notfound = BNE();
@@ -314,7 +314,7 @@ void Jit::GenerateFixedCode() {
//BEQ(outerLoop);
CMPI(DCNTREG, 0);
BLT(outerLoop);
BLE(outerLoop);
SetJumpTarget(badcpustates);
#else
@@ -353,7 +353,7 @@ void Jit::GenerateFixedCode() {
// Restore Lr
MTLR(R12);
Break();
//Break();
// Go back to caller
BLR();
Core/MIPS/PPC/PpcCompBranch.cpp
+29 -16
View File
@@ -58,23 +58,36 @@ void Jit::BranchRSRTComp(u32 op, PpcGen::FixupBranchType cc, bool likely)
CONDITIONAL_NICE_DELAYSLOT;
if (!likely && delaySlotIsNice)
CompileDelaySlot(DELAYSLOT_NICE);
if (gpr.IsImm(rt) && gpr.GetImm(rt) == 0)
{
gpr.MapReg(rs);
CMPLI(gpr.R(rs), 0);
}
else if (gpr.IsImm(rs) && gpr.GetImm(rs) == 0 && (cc == _BEQ || cc == _BNE)) // only these are easily 'flippable'
{
gpr.MapReg(rt);
CMPLI(gpr.R(rt),0);
}
else
{
gpr.MapInIn(rs, rt);
CMP(gpr.R(rs), gpr.R(rt));
}
if (cc == _BEQ || cc == _BNE) {
if (gpr.IsImm(rt) && gpr.GetImm(rt) == 0)
{
gpr.MapReg(rs);
CMPLI(gpr.R(rs), 0);
}
else if (gpr.IsImm(rs) && gpr.GetImm(rs) == 0) // only these are easily 'flippable'
{
gpr.MapReg(rt);
CMPLI(gpr.R(rt), 0);
}
else
{
gpr.MapInIn(rs, rt);
CMPL(gpr.R(rs), gpr.R(rt));
}
} else {
if (gpr.IsImm(rt) && gpr.GetImm(rt) == 0)
{
gpr.MapReg(rs);
CMPLI(gpr.R(rs), 0);
}
else
{
gpr.MapInIn(rs, rt);
CMPL(gpr.R(rs), gpr.R(rt));
}
}
//if (js.compilerPC == 0x089001c4) {
// Break();
// Break();
Core/MIPS/PPC/PpcJit.cpp
+3 -3
View File
@@ -91,10 +91,10 @@ void Jit::RestoreDowncount(PPCReg r) {
}
static void ShowDownCount() {
if (0xfffffffa == currentMIPS->downcount) {
if (currentMIPS->downcount<0) {
//ERROR_LOG(DYNA_REC, "MIPSState, downcount %08x", currentMIPS->downcount);
DebugBreak();
}
ERROR_LOG(DYNA_REC, "MIPSState, downcount %08x", currentMIPS->downcount);
}
void Jit::WriteDownCount(int offset)
@@ -114,7 +114,7 @@ void Jit::WriteDownCount(int offset)
STW(DCNTREG, CTXREG, offsetof(MIPSState, downcount));
}
QuickCallFunction(ShowDownCount);
//QuickCallFunction(ShowDownCount);
CMPI(DCNTREG, 0);
}