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Merge pull request #8416 from unknownbrackets/jit-minor

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Add minor jit optimization from jit-ir
This commit is contained in:
Henrik Rydgård committed 2016-01-10 22:44:54 +01:00
2 parents 0412a9bf47 0fc774927f
commit cfbd932a77
7 files changed
+25 -21
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Core/MIPS/ARM/ArmCompVFPU.cpp
+1 -1
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@@ -136,7 +136,7 @@ namespace MIPSComp
// Prefix may say "z, z, z, z" but if this is a pair, we force to x.
// TODO: But some ops seem to use const 0 instead?
if (regnum >= n) {
WARN_LOG(CPU, "JIT: Invalid VFPU swizzle: %08x : %d / %d at PC = %08x (%s)", prefix, regnum, n, GetCompilerPC(), MIPSDisasmAt(js.compilerPC));
WARN_LOG(CPU, "JIT: Invalid VFPU swizzle: %08x : %d / %d at PC = %08x (%s)", prefix, regnum, n, GetCompilerPC(), MIPSDisasmAt(GetCompilerPC()));
regnum = 0;
}
Core/MIPS/ARM/ArmJit.h
+4 -4
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@@ -30,11 +30,9 @@
#include "stddef.h"
#endif
namespace MIPSComp
{
namespace MIPSComp {
class ArmJit : public ArmGen::ARMXCodeBlock
{
class ArmJit : public ArmGen::ARMXCodeBlock {
public:
ArmJit(MIPSState *mips);
virtual ~ArmJit();
@@ -42,6 +40,8 @@ public:
void DoState(PointerWrap &p);
static void DoDummyState(PointerWrap &p);
const JitOptions &GetJitOptions() { return jo; }
// Compiled ops should ignore delay slots
// the compiler will take care of them by itself
// OR NOT
Core/MIPS/ARM64/Arm64CompVFPU.cpp
+1 -1
View File
@@ -129,7 +129,7 @@ namespace MIPSComp {
// Prefix may say "z, z, z, z" but if this is a pair, we force to x.
// TODO: But some ops seem to use const 0 instead?
if (regnum >= n) {
WARN_LOG(CPU, "JIT: Invalid VFPU swizzle: %08x : %d / %d at PC = %08x (%s)", prefix, regnum, n, GetCompilerPC(), MIPSDisasmAt(js.compilerPC));
WARN_LOG(CPU, "JIT: Invalid VFPU swizzle: %08x : %d / %d at PC = %08x (%s)", prefix, regnum, n, GetCompilerPC(), MIPSDisasmAt(GetCompilerPC()));
regnum = 0;
}
Core/MIPS/ARM64/Arm64Jit.h
+4 -4
View File
@@ -30,11 +30,9 @@
#include "stddef.h"
#endif
namespace MIPSComp
{
namespace MIPSComp {
class Arm64Jit : public Arm64Gen::ARM64CodeBlock
{
class Arm64Jit : public Arm64Gen::ARM64CodeBlock {
public:
Arm64Jit(MIPSState *mips);
virtual ~Arm64Jit();
@@ -42,6 +40,8 @@ public:
void DoState(PointerWrap &p);
static void DoDummyState(PointerWrap &p);
const JitOptions &GetJitOptions() { return jo; }
// Compiled ops should ignore delay slots
// the compiler will take care of them by itself
// OR NOT
Core/MIPS/fake/FakeJit.h
+4 -4
View File
@@ -26,19 +26,19 @@
#include "stddef.h"
#endif
namespace MIPSComp
{
namespace MIPSComp {
typedef int FakeReg;
class FakeJit : public FakeGen::FakeXCodeBlock
{
class FakeJit : public FakeGen::FakeXCodeBlock {
public:
FakeJit(MIPSState *mips);
void DoState(PointerWrap &p);
static void DoDummyState(PointerWrap &p);
const JitOptions &GetJitOptions() { return jo; }
void Comp_Generic(MIPSOpcode op);
void RunLoopUntil(u64 globalticks);
Core/MIPS/x86/CompBranch.cpp
+7 -2
View File
@@ -678,6 +678,7 @@ void Jit::Comp_JumpReg(MIPSOpcode op)
delaySlotIsNice = false;
CONDITIONAL_NICE_DELAYSLOT;
X64Reg destReg = EAX;
if (IsSyscall(delaySlotOp))
{
// If this is a syscall, write the pc (for thread switching and other good reasons.)
@@ -719,7 +720,11 @@ void Jit::Comp_JumpReg(MIPSOpcode op)
return;
}
MOV(32, R(EAX), gpr.R(rs));
if (gpr.R(rs).IsSimpleReg()) {
destReg = gpr.R(rs).GetSimpleReg();
} else {
MOV(32, R(EAX), gpr.R(rs));
}
FlushAll();
}
else
@@ -746,7 +751,7 @@ void Jit::Comp_JumpReg(MIPSOpcode op)
}
CONDITIONAL_LOG_EXIT_EAX();
WriteExitDestInEAX();
WriteExitDestInReg(destReg);
js.compiling = false;
}
Core/MIPS/x86/Jit.h
+4 -5
View File
@@ -34,8 +34,7 @@
class PointerWrap;
namespace MIPSComp
{
namespace MIPSComp {
// This is called when Jit hits a breakpoint. Returns 1 when hit.
u32 JitBreakpoint();
@@ -46,12 +45,13 @@ struct RegCacheState {
FPURegCacheState fpr;
};
class Jit : public Gen::XCodeBlock
{
class Jit : public Gen::XCodeBlock {
public:
Jit(MIPSState *mips);
virtual ~Jit();
const JitOptions &GetJitOptions() { return jo; }
void DoState(PointerWrap &p);
static void DoDummyState(PointerWrap &p);
@@ -194,7 +194,6 @@ private:
void WriteExit(u32 destination, int exit_num);
void WriteExitDestInReg(Gen::X64Reg reg);
void WriteExitDestInEAX() { WriteExitDestInReg(Gen::EAX); }
// void WriteRfiExitDestInEAX();
void WriteSyscallExit();