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Just invalidate blocks on ClearCacheAt().
This makes it safe to call from a jitted syscall, etc.
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@@ -298,8 +298,9 @@ void CBreakPoints::Update(u32 addr)
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{
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if (MIPSComp::jit && Core_IsInactive())
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{
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// In case this is a delay slot, clear the previous instruction too.
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if (addr != 0)
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MIPSComp::jit->ClearCacheAt(addr);
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MIPSComp::jit->ClearCacheAt(addr - 4, 8);
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else
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MIPSComp::jit->ClearCache();
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}
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