From b558189c37ba4e6b7ff09e79eaea2fc474a45b05 Mon Sep 17 00:00:00 2001
From: "Unknown W. Brackets" <checkins@unknownbrackets.org>
Date: Sun, 1 Sep 2013 00:21:41 -0700
Subject: [PATCH] Just invalidate blocks on ClearCacheAt().

This makes it safe to call from a jitted syscall, etc.
---
 Core/Debugger/Breakpoints.cpp       | 3 ++-
 Core/MIPS/ARM/ArmJit.cpp            | 5 ++---
 Core/MIPS/ARM/ArmJit.h              | 2 +-
 Core/MIPS/PPC/PpcJit.cpp            | 4 ++--
 Core/MIPS/PPC/PpcJit.h              | 2 +-
 Core/MIPS/x86/Jit.cpp               | 5 ++---
 Core/MIPS/x86/Jit.h                 | 2 +-
 Windows/Debugger/CtrlDisAsmView.cpp | 5 +++--
 8 files changed, 14 insertions(+), 14 deletions(-)

diff --git a/Core/Debugger/Breakpoints.cpp b/Core/Debugger/Breakpoints.cpp
index 8b5cd9810d..369bf7b1a5 100644
--- a/Core/Debugger/Breakpoints.cpp
+++ b/Core/Debugger/Breakpoints.cpp
@@ -298,8 +298,9 @@ void CBreakPoints::Update(u32 addr)
 {
 	if (MIPSComp::jit && Core_IsInactive())
 	{
+		// In case this is a delay slot, clear the previous instruction too.
 		if (addr != 0)
-			MIPSComp::jit->ClearCacheAt(addr);
+			MIPSComp::jit->ClearCacheAt(addr - 4, 8);
 		else
 			MIPSComp::jit->ClearCache();
 	}
diff --git a/Core/MIPS/ARM/ArmJit.cpp b/Core/MIPS/ARM/ArmJit.cpp
index 049b7105bc..42e2da00c1 100644
--- a/Core/MIPS/ARM/ArmJit.cpp
+++ b/Core/MIPS/ARM/ArmJit.cpp
@@ -118,10 +118,9 @@ void Jit::ClearCache()
 	GenerateFixedCode();
 }
 
-void Jit::ClearCacheAt(u32 em_address)
+void Jit::ClearCacheAt(u32 em_address, int length)
 {
-	// TODO: Properly.
-	ClearCache();
+	blocks.InvalidateICache(em_address, length);
 }
 
 void Jit::CompileAt(u32 addr)
diff --git a/Core/MIPS/ARM/ArmJit.h b/Core/MIPS/ARM/ArmJit.h
index 689361e221..2379dd9254 100644
--- a/Core/MIPS/ARM/ArmJit.h
+++ b/Core/MIPS/ARM/ArmJit.h
@@ -230,7 +230,7 @@ public:
 	JitBlockCache *GetBlockCache() { return &blocks; }
 
 	void ClearCache();
-	void ClearCacheAt(u32 em_address);
+	void ClearCacheAt(u32 em_address, int length = 4);
 
 	void EatPrefix() { js.EatPrefix(); }
 
diff --git a/Core/MIPS/PPC/PpcJit.cpp b/Core/MIPS/PPC/PpcJit.cpp
index 46b0c6c025..31b5c32804 100644
--- a/Core/MIPS/PPC/PpcJit.cpp
+++ b/Core/MIPS/PPC/PpcJit.cpp
@@ -169,8 +169,8 @@ void Jit::ClearCache() {
 	GenerateFixedCode();
 }
 
-void Jit::ClearCacheAt(u32 em_address) {
-	ClearCache();
+void Jit::ClearCacheAt(u32 em_address, int length) {
+	blocks.InvalidateICache(em_address, length);
 }
 
 Jit::Jit(MIPSState *mips) : blocks(mips, this), gpr(mips, &jo),mips_(mips)
diff --git a/Core/MIPS/PPC/PpcJit.h b/Core/MIPS/PPC/PpcJit.h
index 3aa087e694..1eef944a82 100644
--- a/Core/MIPS/PPC/PpcJit.h
+++ b/Core/MIPS/PPC/PpcJit.h
@@ -242,7 +242,7 @@ namespace MIPSComp
 		void WriteSyscallExit();
 
 		void ClearCache();
-		void ClearCacheAt(u32 em_address);	
+		void ClearCacheAt(u32 em_address, int length = 4);
 
 		void RunLoopUntil(u64 globalticks);
 		void GenerateFixedCode();
diff --git a/Core/MIPS/x86/Jit.cpp b/Core/MIPS/x86/Jit.cpp
index 288f3db257..c6e550b4fa 100644
--- a/Core/MIPS/x86/Jit.cpp
+++ b/Core/MIPS/x86/Jit.cpp
@@ -188,10 +188,9 @@ void Jit::ClearCache()
 	ClearCodeSpace();
 }
 
-void Jit::ClearCacheAt(u32 em_address)
+void Jit::ClearCacheAt(u32 em_address, int length)
 {
-	// TODO: Properly.
-	ClearCache();
+	blocks.InvalidateICache(em_address, length);
 }
 
 void Jit::CompileDelaySlot(int flags, RegCacheState *state)
diff --git a/Core/MIPS/x86/Jit.h b/Core/MIPS/x86/Jit.h
index 72c703d299..1171e3c8e3 100644
--- a/Core/MIPS/x86/Jit.h
+++ b/Core/MIPS/x86/Jit.h
@@ -266,7 +266,7 @@ public:
 	AsmRoutineManager &Asm() { return asm_; }
 
 	void ClearCache();
-	void ClearCacheAt(u32 em_address);
+	void ClearCacheAt(u32 em_address, int length = 4);
 private:
 	void GetStateAndFlushAll(RegCacheState &state);
 	void RestoreState(const RegCacheState state);
diff --git a/Windows/Debugger/CtrlDisAsmView.cpp b/Windows/Debugger/CtrlDisAsmView.cpp
index e6a8db36ac..9aa7e66dc5 100644
--- a/Windows/Debugger/CtrlDisAsmView.cpp
+++ b/Windows/Debugger/CtrlDisAsmView.cpp
@@ -308,9 +308,10 @@ void CtrlDisAsmView::assembleOpcode(u32 address, std::string defaultText)
 	result = MIPSAsm::MipsAssembleOpcode(op.c_str(),debugger,address,encoded);
 	if (result == true)
 	{
-		Memory::Write_U32(encoded,address);
+		Memory::Write_U32(encoded, address);
+		// In case this is a delay slot or combined instruction, clear cache above it too.
 		if (MIPSComp::jit)
-			MIPSComp::jit->ClearCacheAt(address);
+			MIPSComp::jit->ClearCacheAt(address - 4, 8);
 		redraw();
 	} else {
 		MessageBox(wnd,L"Couldn't assemble.",L"Error",MB_OK);