Merge AsmRoutineManager into Jit. Allows safe short branches.

Core/MIPS/ARM/ArmAsm.cpp

@@ -60,7 +60,7 @@ static bool enableDebug = false;
 // R9 : 
 extern volatile CoreState coreState;
 
-void Jit()
+void JitAt()
 {
 	MIPSComp::jit->Compile(currentMIPS->pc);
 }
@@ -79,8 +79,9 @@ void DisassembleArm(const u8 *data, int size);
 // dynarec buffer
 // At this offset - 4, there is an int specifying the block number.
 
+namespace MIPSComp {
 
-void ArmAsmRoutineManager::Generate(MIPSState *mips, MIPSComp::Jit *jit)
+void Jit::GenerateFixedCode()
 {
 	enterCode = AlignCode16();
 
@@ -93,8 +94,8 @@ void ArmAsmRoutineManager::Generate(MIPSState *mips, MIPSComp::Jit *jit)
 	// Fixed registers, these are always kept when in Jit context.
 	// R13 cannot be used as it's the stack pointer.
 	ARMABI_MOVI2R(R11, (u32)Memory::base);
-	ARMABI_MOVI2R(R10, (u32)mips);
-	ARMABI_MOVI2R(R9, (u32)jit->GetBlockCache()->GetCodePointers());
+	ARMABI_MOVI2R(R10, (u32)mips_);
+	ARMABI_MOVI2R(R9, (u32)GetBlockCache()->GetCodePointers());
 
 	outerLoop = GetCodePtr();
 		QuickCallFunction(R0, (void *)&CoreTiming::Advance);
@@ -140,7 +141,7 @@ void ArmAsmRoutineManager::Generate(MIPSState *mips, MIPSComp::Jit *jit)
 			SetCC(CC_AL);
 
 			//Ok, no block, let's jit
-			ARMABI_CallFunction((void *)&Jit);
+			ARMABI_CallFunction((void *)&JitAt);
 
 			B(dispatcherNoCheck); // no point in special casing this
 
@@ -165,4 +166,6 @@ void ArmAsmRoutineManager::Generate(MIPSState *mips, MIPSComp::Jit *jit)
 
 	// Don't forget to zap the instruction cache!
 	FlushIcache();
-}
+}
+
+}  // namespace

Core/MIPS/ARM/ArmAsm.h

@@ -23,40 +23,5 @@
 
 // Runtime generated assembly routines, like the Dispatcher.
 
-namespace MIPSComp
-{
-	class Jit;
-}
-
-class ArmAsmRoutineManager : public ArmGen::ARMXCodeBlock
-{
-public:
-	ArmAsmRoutineManager()
-	{
-	}
-	~ArmAsmRoutineManager()
-	{
-		FreeCodeSpace();
-	}
-
-	void Init(MIPSState *mips, MIPSComp::Jit *jit)
-	{
-		AllocCodeSpace(8192);
-		Generate(mips, jit);
-		WriteProtect();
-	}
-
-	const u8 *enterCode;
-
-	const u8 *outerLoop;
-	const u8 *dispatcherCheckCoreState;
-	const u8 *dispatcher;
-	const u8 *dispatcherNoCheck;
-
-	const u8 *breakpointBailout;
-
-private:
-	void Generate(MIPSState *mips, MIPSComp::Jit *jit);
-};
 
 #endif	// _JIT64ASM_H

Core/MIPS/ARM/ArmJit.cpp

@@ -57,13 +57,12 @@ namespace MIPSComp
 Jit::Jit(MIPSState *mips) : blocks(mips), gpr(mips), mips_(mips)
 { 
 	blocks.Init();
-	asm_.Init(mips, this);
 	gpr.SetEmitter(this);
 	//fpr.SetEmitter(this);
-	AllocCodeSpace(1024 * 1024 * 16);
+	AllocCodeSpace(1024 * 1024 * 16);  // 32MB is the absolute max because that's what an ARM branch instruction can reach, backwards and forwards.
+	GenerateFixedCode();
 }
 
-
 void Jit::FlushAll()
 {
 	gpr.FlushAll();
@@ -74,6 +73,7 @@ void Jit::ClearCache()
 {
 	blocks.Clear();
 	ClearCodeSpace();
+	GenerateFixedCode();
 }
 
 void Jit::CompileAt(u32 addr)
@@ -97,7 +97,7 @@ void Jit::Compile(u32 em_address)
 void Jit::RunLoopUntil(u64 globalticks)
 {
 	// TODO: copy globalticks somewhere
-	((void (*)())asm_.enterCode)();
+	((void (*)())enterCode)();
 }
 
 const u8 *Jit::DoJit(u32 em_address, ArmJitBlock *b)
@@ -115,8 +115,7 @@ const u8 *Jit::DoJit(u32 em_address, ArmJitBlock *b)
 	SetCC(CC_LT);
 	ARMABI_MOVI2R(R0, js.blockStart);
 	MovToPC(R0);
-	ARMABI_MOVI2R(R0, (u32)asm_.outerLoop);   // downcount hit zero - go advance.
-	B(R0);
+	B((const void *)outerLoop);
 	SetCC(CC_AL);
 
 	b->normalEntry = GetCodePtr();
@@ -239,8 +238,7 @@ void Jit::WriteExit(u32 destination, int exit_num)
 	} else {
 		ARMABI_MOVI2R(R0, destination);
 		MovToPC(R0);
-		ARMABI_MOVI2R(R0, (u32)asm_.dispatcher);
-		B(R0);	
+		B((const void *)dispatcher);	
 	}
 }
 
@@ -249,15 +247,13 @@ void Jit::WriteExitDestInR(ARMReg Reg)
 	MovToPC(Reg);
 	DoDownCount();
 	// TODO: shouldn't need an indirect branch here...
-	ARMABI_MOVI2R(R0, (u32)asm_.dispatcher);
-	B(R0);
+	B((const void *)dispatcher);
 }
 
 void Jit::WriteSyscallExit()
 {
 	DoDownCount();
-	ARMABI_MOVI2R(R0, (u32)asm_.dispatcherCheckCoreState);
-	B(R0);
+	B((const void *)dispatcherCheckCoreState);
 }
 
 

Core/MIPS/ARM/ArmJit.h

@@ -88,13 +88,14 @@ public:
 	void Comp_mxc1(u32 op);
 
 	ArmJitBlockCache *GetBlockCache() { return &blocks; }
-	ArmAsmRoutineManager &Asm() { return asm_; }
 
 	void ClearCache();
 
 private:
+	void GenerateFixedCode();
 	void FlushAll();
 
+	// TODO: Split into two parts, the first part can be shared in branches.
 	void DoDownCount();
 	void MovFromPC(ARMReg r);
 	void MovToPC(ARMReg r);
@@ -128,9 +129,17 @@ private:
 	ArmRegCache gpr;
 	// FPURegCache fpr;
 
-	ArmAsmRoutineManager asm_;
-
 	MIPSState *mips_;
+
+	// Code pointers
+	const u8 *enterCode;
+
+	const u8 *outerLoop;
+	const u8 *dispatcherCheckCoreState;
+	const u8 *dispatcher;
+	const u8 *dispatcherNoCheck;
+
+	const u8 *breakpointBailout;
 };
 
 typedef void (Jit::*MIPSCompileFunc)(u32 opcode);