Remove preprocessor hacks to choose JIT implementation.

Opens up for having multiple JIT implementations available at runtime,
which could be use for experimenting with new JIT compiler types or for
unit testing one JIT on another architecture.

Very few of the newly virtual calls are on any sort of critical path so
hopefully there will not be a performance loss.

CMakeLists.txt

@@ -1389,6 +1389,7 @@ add_library(${CoreLibName} ${CoreLinkType}
 	Core/FileLoaders/RetryingFileLoader.h
 	Core/MIPS/JitCommon/JitCommon.cpp
 	Core/MIPS/JitCommon/JitCommon.h
+	Core/MIPS/JitCommon/NativeJit.cpp
 	Core/MIPS/JitCommon/NativeJit.h
 	Core/MIPS/JitCommon/JitBlockCache.cpp
 	Core/MIPS/JitCommon/JitBlockCache.h

Common/CodeBlock.h

@@ -11,7 +11,7 @@
 // You get memory management for free, plus, you can use all emitter functions without
 // having to prefix them with gen-> or something similar.
 // Example implementation:
-// class JIT : public CodeBlock<ARMXEmitter> {}
+// class JIT : public CodeBlock<ARMXEmitter>, public JitInterface {}
 template<class T> class CodeBlock : public T, NonCopyable
 {
 private:

Core/Core.vcxproj

@@ -426,6 +426,7 @@
     <ClCompile Include="MIPS\JitCommon\JitBlockCache.cpp" />
     <ClCompile Include="MIPS\JitCommon\JitCommon.cpp" />
     <ClCompile Include="MIPS\JitCommon\JitState.cpp" />
+    <ClCompile Include="MIPS\JitCommon\NativeJit.cpp" />
     <ClCompile Include="MIPS\MIPS.cpp" />
     <ClCompile Include="MIPS\MIPSAnalyst.cpp" />
     <ClCompile Include="MIPS\MIPSAsm.cpp" />
@@ -737,4 +738,4 @@
   <Import Project="$(VCTargetsPath)\Microsoft.Cpp.targets" />
   <ImportGroup Label="ExtensionTargets">
   </ImportGroup>
-</Project>
+</Project>

Core/Core.vcxproj.filters

@@ -631,6 +631,9 @@
     <ClCompile Include="FileLoaders\RamCachingFileLoader.cpp">
       <Filter>FileLoaders</Filter>
     </ClCompile>
+    <ClCompile Include="MIPS\JitCommon\NativeJit.cpp">
+      <Filter>MIPS\JitCommon</Filter>
+    </ClCompile>
   </ItemGroup>
   <ItemGroup>
     <ClInclude Include="ELF\ElfReader.h">

Core/Debugger/Breakpoints.cpp

@@ -15,6 +15,9 @@
 // Official git repository and contact information can be found at
 // https://github.com/hrydgard/ppsspp and http://www.ppsspp.org/.
 
+#include <cstdio>
+
+#include "Common/Log.h"
 #include "Core/Core.h"
 #include "Core/Debugger/Breakpoints.h"
 #include "Core/Debugger/SymbolMap.h"
@@ -22,7 +25,6 @@
 #include "Core/MIPS/MIPSAnalyst.h"
 #include "Core/MIPS/JitCommon/NativeJit.h"
 #include "Core/CoreTiming.h"
-#include <cstdio>
 
 std::vector<BreakPoint> CBreakPoints::breakPoints_;
 u32 CBreakPoints::breakSkipFirstAt_ = 0;

Core/HLE/ReplaceTables.cpp

@@ -1109,17 +1109,7 @@ static int Hook_omertachinmokunookitethelegacy_download_frame() {
 	return 0;
 }
 
-#ifdef ARM
-#define JITFUNC(f) (&MIPSComp::ArmJit::f)
-#elif defined(ARM64)
-#define JITFUNC(f) (&MIPSComp::Arm64Jit::f)
-#elif defined(_M_X64) || defined(_M_IX86)
-#define JITFUNC(f) (&MIPSComp::Jit::f)
-#elif defined(MIPS)
-#define JITFUNC(f) (&MIPSComp::MipsJit::f)
-#else
-#define JITFUNC(f) (&MIPSComp::FakeJit::f)
-#endif
+#define JITFUNC(f) (&MIPSComp::JitInterface::f)
 
 // Can either replace with C functions or functions emitted in Asm/ArmAsm.
 static const ReplacementTableEntry entries[] = {

Core/MIPS/ARM/ArmJit.h

@@ -22,6 +22,7 @@
 #include "Common/ArmEmitter.h"
 #include "Core/MIPS/JitCommon/JitState.h"
 #include "Core/MIPS/JitCommon/JitBlockCache.h"
+#include "Core/MIPS/JitCommon/NativeJit.h"
 #include "Core/MIPS/ARM/ArmRegCache.h"
 #include "Core/MIPS/ARM/ArmRegCacheFPU.h"
 #include "Core/MIPS/MIPSVFPUUtils.h"
@@ -32,98 +33,97 @@
 
 namespace MIPSComp {
 
-class ArmJit : public ArmGen::ARMXCodeBlock {
+class ArmJit : public ArmGen::ARMXCodeBlock, public JitInterface {
 public:
 	ArmJit(MIPSState *mips);
 	virtual ~ArmJit();
 
-	void DoState(PointerWrap &p);
-	static void DoDummyState(PointerWrap &p);
+	void DoState(PointerWrap &p) override;
+	void DoDummyState(PointerWrap &p) override;
 
 	const JitOptions &GetJitOptions() { return jo; }
 
 	// Compiled ops should ignore delay slots
 	// the compiler will take care of them by itself
 	// OR NOT
-	void Comp_Generic(MIPSOpcode op);
+	void Comp_Generic(MIPSOpcode op) override;
 
-	void RunLoopUntil(u64 globalticks);
+	void RunLoopUntil(u64 globalticks) override;
 
-	void Compile(u32 em_address);	// Compiles a block at current MIPS PC
-	const u8 *DoJit(u32 em_address, JitBlock *b);
+	void Compile(u32 em_address) override;	// Compiles a block at current MIPS PC
 
-	bool DescribeCodePtr(const u8 *ptr, std::string &name);
+	bool DescribeCodePtr(const u8 *ptr, std::string &name) override;
 
-	void Comp_RunBlock(MIPSOpcode op);
-	void Comp_ReplacementFunc(MIPSOpcode op);
+	void Comp_RunBlock(MIPSOpcode op) override;
+	void Comp_ReplacementFunc(MIPSOpcode op) override;
 
 	// Ops
-	void Comp_ITypeMem(MIPSOpcode op);
-	void Comp_Cache(MIPSOpcode op);
+	void Comp_ITypeMem(MIPSOpcode op) override;
+	void Comp_Cache(MIPSOpcode op) override;
 
-	void Comp_RelBranch(MIPSOpcode op);
-	void Comp_RelBranchRI(MIPSOpcode op);
-	void Comp_FPUBranch(MIPSOpcode op);
-	void Comp_FPULS(MIPSOpcode op);
-	void Comp_FPUComp(MIPSOpcode op);
-	void Comp_Jump(MIPSOpcode op);
-	void Comp_JumpReg(MIPSOpcode op);
-	void Comp_Syscall(MIPSOpcode op);
-	void Comp_Break(MIPSOpcode op);
+	void Comp_RelBranch(MIPSOpcode op) override;
+	void Comp_RelBranchRI(MIPSOpcode op) override;
+	void Comp_FPUBranch(MIPSOpcode op) override;
+	void Comp_FPULS(MIPSOpcode op) override;
+	void Comp_FPUComp(MIPSOpcode op) override;
+	void Comp_Jump(MIPSOpcode op) override;
+	void Comp_JumpReg(MIPSOpcode op) override;
+	void Comp_Syscall(MIPSOpcode op) override;
+	void Comp_Break(MIPSOpcode op) override;
 
-	void Comp_IType(MIPSOpcode op);
-	void Comp_RType2(MIPSOpcode op);
-	void Comp_RType3(MIPSOpcode op);
-	void Comp_ShiftType(MIPSOpcode op);
-	void Comp_Allegrex(MIPSOpcode op);
-	void Comp_Allegrex2(MIPSOpcode op);
-	void Comp_VBranch(MIPSOpcode op);
-	void Comp_MulDivType(MIPSOpcode op);
-	void Comp_Special3(MIPSOpcode op);
+	void Comp_IType(MIPSOpcode op) override;
+	void Comp_RType2(MIPSOpcode op) override;
+	void Comp_RType3(MIPSOpcode op) override;
+	void Comp_ShiftType(MIPSOpcode op) override;
+	void Comp_Allegrex(MIPSOpcode op) override;
+	void Comp_Allegrex2(MIPSOpcode op) override;
+	void Comp_VBranch(MIPSOpcode op) override;
+	void Comp_MulDivType(MIPSOpcode op) override;
+	void Comp_Special3(MIPSOpcode op) override;
 
-	void Comp_FPU3op(MIPSOpcode op);
-	void Comp_FPU2op(MIPSOpcode op);
-	void Comp_mxc1(MIPSOpcode op);
+	void Comp_FPU3op(MIPSOpcode op) override;
+	void Comp_FPU2op(MIPSOpcode op) override;
+	void Comp_mxc1(MIPSOpcode op) override;
 
-	void Comp_DoNothing(MIPSOpcode op);
+	void Comp_DoNothing(MIPSOpcode op) override;
 
-	void Comp_SV(MIPSOpcode op);
-	void Comp_SVQ(MIPSOpcode op);
-	void Comp_VPFX(MIPSOpcode op);
-	void Comp_VVectorInit(MIPSOpcode op);
-	void Comp_VMatrixInit(MIPSOpcode op);
-	void Comp_VDot(MIPSOpcode op);
-	void Comp_VecDo3(MIPSOpcode op);
-	void Comp_VV2Op(MIPSOpcode op);
-	void Comp_Mftv(MIPSOpcode op);
-	void Comp_Vmfvc(MIPSOpcode op);
-	void Comp_Vmtvc(MIPSOpcode op);
-	void Comp_Vmmov(MIPSOpcode op);
-	void Comp_VScl(MIPSOpcode op);
-	void Comp_Vmmul(MIPSOpcode op);
-	void Comp_Vmscl(MIPSOpcode op);
-	void Comp_Vtfm(MIPSOpcode op);
-	void Comp_VHdp(MIPSOpcode op);
-	void Comp_VCrs(MIPSOpcode op);
-	void Comp_VDet(MIPSOpcode op);
-	void Comp_Vi2x(MIPSOpcode op);
-	void Comp_Vx2i(MIPSOpcode op);
-	void Comp_Vf2i(MIPSOpcode op);
-	void Comp_Vi2f(MIPSOpcode op);
-	void Comp_Vh2f(MIPSOpcode op);
-	void Comp_Vcst(MIPSOpcode op);
-	void Comp_Vhoriz(MIPSOpcode op);
-	void Comp_VRot(MIPSOpcode op);
-	void Comp_VIdt(MIPSOpcode op);
-	void Comp_Vcmp(MIPSOpcode op);
-	void Comp_Vcmov(MIPSOpcode op);
-	void Comp_Viim(MIPSOpcode op);
-	void Comp_Vfim(MIPSOpcode op);
-	void Comp_VCrossQuat(MIPSOpcode op);
-	void Comp_Vsgn(MIPSOpcode op);
-	void Comp_Vocp(MIPSOpcode op);
-	void Comp_ColorConv(MIPSOpcode op);
-	void Comp_Vbfy(MIPSOpcode op);
+	void Comp_SV(MIPSOpcode op) override;
+	void Comp_SVQ(MIPSOpcode op) override;
+	void Comp_VPFX(MIPSOpcode op) override;
+	void Comp_VVectorInit(MIPSOpcode op) override;
+	void Comp_VMatrixInit(MIPSOpcode op) override;
+	void Comp_VDot(MIPSOpcode op) override;
+	void Comp_VecDo3(MIPSOpcode op) override;
+	void Comp_VV2Op(MIPSOpcode op) override;
+	void Comp_Mftv(MIPSOpcode op) override;
+	void Comp_Vmfvc(MIPSOpcode op) override;
+	void Comp_Vmtvc(MIPSOpcode op) override;
+	void Comp_Vmmov(MIPSOpcode op) override;
+	void Comp_VScl(MIPSOpcode op) override;
+	void Comp_Vmmul(MIPSOpcode op) override;
+	void Comp_Vmscl(MIPSOpcode op) override;
+	void Comp_Vtfm(MIPSOpcode op) override;
+	void Comp_VHdp(MIPSOpcode op) override;
+	void Comp_VCrs(MIPSOpcode op) override;
+	void Comp_VDet(MIPSOpcode op) override;
+	void Comp_Vi2x(MIPSOpcode op) override;
+	void Comp_Vx2i(MIPSOpcode op) override;
+	void Comp_Vf2i(MIPSOpcode op) override;
+	void Comp_Vi2f(MIPSOpcode op) override;
+	void Comp_Vh2f(MIPSOpcode op) override;
+	void Comp_Vcst(MIPSOpcode op) override;
+	void Comp_Vhoriz(MIPSOpcode op) override;
+	void Comp_VRot(MIPSOpcode op) override;
+	void Comp_VIdt(MIPSOpcode op) override;
+	void Comp_Vcmp(MIPSOpcode op) override;
+	void Comp_Vcmov(MIPSOpcode op) override;
+	void Comp_Viim(MIPSOpcode op) override;
+	void Comp_Vfim(MIPSOpcode op) override;
+	void Comp_VCrossQuat(MIPSOpcode op) override;
+	void Comp_Vsgn(MIPSOpcode op) override;
+	void Comp_Vocp(MIPSOpcode op) override;
+	void Comp_ColorConv(MIPSOpcode op) override;
+	void Comp_Vbfy(MIPSOpcode op) override;
 
 	// Non-NEON: VPFX
 
@@ -167,15 +167,21 @@ public:
 
 	int Replace_fabsf();
 
-	JitBlockCache *GetBlockCache() { return &blocks; }
+	JitBlockCache *GetBlockCache() override { return &blocks; }
 
-	void ClearCache();
-	void InvalidateCache();
-	void InvalidateCacheAt(u32 em_address, int length = 4);
+	void ClearCache() override;
+	void InvalidateCache() override;
+	void InvalidateCacheAt(u32 em_address, int length = 4) override;
 
-	void EatPrefix() { js.EatPrefix(); }
+	void EatPrefix() override { js.EatPrefix(); }
+
+	const u8 *GetDispatcher() const override {
+		return dispatcher;
+	}
 
 private:
+	const u8 *DoJit(u32 em_address, JitBlock *b);
+
 	void GenerateFixedCode();
 	void FlushAll();
 	void FlushPrefixV();

Core/MIPS/ARM64/Arm64Jit.h

@@ -22,6 +22,7 @@
 #include "Common/Arm64Emitter.h"
 #include "Core/MIPS/JitCommon/JitState.h"
 #include "Core/MIPS/JitCommon/JitBlockCache.h"
+#include "Core/MIPS/JitCommon/NativeJit.h"
 #include "Core/MIPS/ARM64/Arm64RegCache.h"
 #include "Core/MIPS/ARM64/Arm64RegCacheFPU.h"
 #include "Core/MIPS/MIPSVFPUUtils.h"
@@ -32,98 +33,98 @@
 
 namespace MIPSComp {
 
-class Arm64Jit : public Arm64Gen::ARM64CodeBlock {
+class Arm64Jit : public Arm64Gen::ARM64CodeBlock, public JitInterface {
 public:
 	Arm64Jit(MIPSState *mips);
 	virtual ~Arm64Jit();
 
-	void DoState(PointerWrap &p);
-	static void DoDummyState(PointerWrap &p);
+	void DoState(PointerWrap &p) override;
+	void DoDummyState(PointerWrap &p) override;
 
 	const JitOptions &GetJitOptions() { return jo; }
 
 	// Compiled ops should ignore delay slots
 	// the compiler will take care of them by itself
 	// OR NOT
-	void Comp_Generic(MIPSOpcode op);
+	void Comp_Generic(MIPSOpcode op) override;
 
-	void RunLoopUntil(u64 globalticks);
+	void RunLoopUntil(u64 globalticks) override;
 
-	void Compile(u32 em_address);	// Compiles a block at current MIPS PC
+	void Compile(u32 em_address) override;	// Compiles a block at current MIPS PC
 	const u8 *DoJit(u32 em_address, JitBlock *b);
 
-	bool DescribeCodePtr(const u8 *ptr, std::string &name);
+	bool DescribeCodePtr(const u8 *ptr, std::string &name) override;
 
-	void Comp_RunBlock(MIPSOpcode op);
-	void Comp_ReplacementFunc(MIPSOpcode op);
+	void Comp_RunBlock(MIPSOpcode op) override;
+	void Comp_ReplacementFunc(MIPSOpcode op) override;
 
 	// Ops
-	void Comp_ITypeMem(MIPSOpcode op);
-	void Comp_Cache(MIPSOpcode op);
+	void Comp_ITypeMem(MIPSOpcode op) override;
+	void Comp_Cache(MIPSOpcode op) override;
 
-	void Comp_RelBranch(MIPSOpcode op);
-	void Comp_RelBranchRI(MIPSOpcode op);
-	void Comp_FPUBranch(MIPSOpcode op);
-	void Comp_FPULS(MIPSOpcode op);
-	void Comp_FPUComp(MIPSOpcode op);
-	void Comp_Jump(MIPSOpcode op);
-	void Comp_JumpReg(MIPSOpcode op);
-	void Comp_Syscall(MIPSOpcode op);
-	void Comp_Break(MIPSOpcode op);
+	void Comp_RelBranch(MIPSOpcode op) override;
+	void Comp_RelBranchRI(MIPSOpcode op) override;
+	void Comp_FPUBranch(MIPSOpcode op) override;
+	void Comp_FPULS(MIPSOpcode op) override;
+	void Comp_FPUComp(MIPSOpcode op) override;
+	void Comp_Jump(MIPSOpcode op) override;
+	void Comp_JumpReg(MIPSOpcode op) override;
+	void Comp_Syscall(MIPSOpcode op) override;
+	void Comp_Break(MIPSOpcode op) override;
 
-	void Comp_IType(MIPSOpcode op);
-	void Comp_RType2(MIPSOpcode op);
-	void Comp_RType3(MIPSOpcode op);
-	void Comp_ShiftType(MIPSOpcode op);
-	void Comp_Allegrex(MIPSOpcode op);
-	void Comp_Allegrex2(MIPSOpcode op);
-	void Comp_VBranch(MIPSOpcode op);
-	void Comp_MulDivType(MIPSOpcode op);
-	void Comp_Special3(MIPSOpcode op);
+	void Comp_IType(MIPSOpcode op) override;
+	void Comp_RType2(MIPSOpcode op) override;
+	void Comp_RType3(MIPSOpcode op) override;
+	void Comp_ShiftType(MIPSOpcode op) override;
+	void Comp_Allegrex(MIPSOpcode op) override;
+	void Comp_Allegrex2(MIPSOpcode op) override;
+	void Comp_VBranch(MIPSOpcode op) override;
+	void Comp_MulDivType(MIPSOpcode op) override;
+	void Comp_Special3(MIPSOpcode op) override;
 
-	void Comp_FPU3op(MIPSOpcode op);
-	void Comp_FPU2op(MIPSOpcode op);
-	void Comp_mxc1(MIPSOpcode op);
+	void Comp_FPU3op(MIPSOpcode op) override;
+	void Comp_FPU2op(MIPSOpcode op) override;
+	void Comp_mxc1(MIPSOpcode op) override;
 
-	void Comp_DoNothing(MIPSOpcode op);
+	void Comp_DoNothing(MIPSOpcode op) override;
 
-	void Comp_SV(MIPSOpcode op);
-	void Comp_SVQ(MIPSOpcode op);
-	void Comp_VPFX(MIPSOpcode op);
-	void Comp_VVectorInit(MIPSOpcode op);
-	void Comp_VMatrixInit(MIPSOpcode op);
-	void Comp_VDot(MIPSOpcode op);
-	void Comp_VecDo3(MIPSOpcode op);
-	void Comp_VV2Op(MIPSOpcode op);
-	void Comp_Mftv(MIPSOpcode op);
-	void Comp_Vmfvc(MIPSOpcode op);
-	void Comp_Vmtvc(MIPSOpcode op);
-	void Comp_Vmmov(MIPSOpcode op);
-	void Comp_VScl(MIPSOpcode op);
-	void Comp_Vmmul(MIPSOpcode op);
-	void Comp_Vmscl(MIPSOpcode op);
-	void Comp_Vtfm(MIPSOpcode op);
-	void Comp_VHdp(MIPSOpcode op);
-	void Comp_VCrs(MIPSOpcode op);
-	void Comp_VDet(MIPSOpcode op);
-	void Comp_Vi2x(MIPSOpcode op);
-	void Comp_Vx2i(MIPSOpcode op);
-	void Comp_Vf2i(MIPSOpcode op);
-	void Comp_Vi2f(MIPSOpcode op);
-	void Comp_Vh2f(MIPSOpcode op);
-	void Comp_Vcst(MIPSOpcode op);
-	void Comp_Vhoriz(MIPSOpcode op);
-	void Comp_VRot(MIPSOpcode op);
-	void Comp_VIdt(MIPSOpcode op);
-	void Comp_Vcmp(MIPSOpcode op);
-	void Comp_Vcmov(MIPSOpcode op);
-	void Comp_Viim(MIPSOpcode op);
-	void Comp_Vfim(MIPSOpcode op);
-	void Comp_VCrossQuat(MIPSOpcode op);
-	void Comp_Vsgn(MIPSOpcode op);
-	void Comp_Vocp(MIPSOpcode op);
-	void Comp_ColorConv(MIPSOpcode op);
-	void Comp_Vbfy(MIPSOpcode op);
+	void Comp_SV(MIPSOpcode op) override;
+	void Comp_SVQ(MIPSOpcode op) override;
+	void Comp_VPFX(MIPSOpcode op) override;
+	void Comp_VVectorInit(MIPSOpcode op) override;
+	void Comp_VMatrixInit(MIPSOpcode op) override;
+	void Comp_VDot(MIPSOpcode op) override;
+	void Comp_VecDo3(MIPSOpcode op) override;
+	void Comp_VV2Op(MIPSOpcode op) override;
+	void Comp_Mftv(MIPSOpcode op) override;
+	void Comp_Vmfvc(MIPSOpcode op) override;
+	void Comp_Vmtvc(MIPSOpcode op) override;
+	void Comp_Vmmov(MIPSOpcode op) override;
+	void Comp_VScl(MIPSOpcode op) override;
+	void Comp_Vmmul(MIPSOpcode op) override;
+	void Comp_Vmscl(MIPSOpcode op) override;
+	void Comp_Vtfm(MIPSOpcode op) override;
+	void Comp_VHdp(MIPSOpcode op) override;
+	void Comp_VCrs(MIPSOpcode op) override;
+	void Comp_VDet(MIPSOpcode op) override;
+	void Comp_Vi2x(MIPSOpcode op) override;
+	void Comp_Vx2i(MIPSOpcode op) override;
+	void Comp_Vf2i(MIPSOpcode op) override;
+	void Comp_Vi2f(MIPSOpcode op) override;
+	void Comp_Vh2f(MIPSOpcode op) override;
+	void Comp_Vcst(MIPSOpcode op) override;
+	void Comp_Vhoriz(MIPSOpcode op) override;
+	void Comp_VRot(MIPSOpcode op) override;
+	void Comp_VIdt(MIPSOpcode op) override;
+	void Comp_Vcmp(MIPSOpcode op) override;
+	void Comp_Vcmov(MIPSOpcode op) override;
+	void Comp_Viim(MIPSOpcode op) override;
+	void Comp_Vfim(MIPSOpcode op) override;
+	void Comp_VCrossQuat(MIPSOpcode op) override;
+	void Comp_Vsgn(MIPSOpcode op) override;
+	void Comp_Vocp(MIPSOpcode op) override;
+	void Comp_ColorConv(MIPSOpcode op) override;
+	void Comp_Vbfy(MIPSOpcode op) override;
 
 	// Non-NEON: VPFX
 
@@ -175,6 +176,10 @@ public:
 
 	void EatPrefix() { js.EatPrefix(); }
 
+	const u8 *GetDispatcher() const override {
+		return dispatcher;
+	}
+
 private:
 	void GenerateFixedCode(const JitOptions &jo);
 	void FlushAll();

Core/MIPS/JitCommon/JitBlockCache.cpp

@@ -62,11 +62,13 @@ op_agent_t agent;
 #endif
 
 #ifdef ARM
+#include "Core/MIPS/ARM/ArmRegCache.h"
 using namespace ArmGen;
 using namespace ArmJitConstants;
 #elif defined(_M_X64) || defined(_M_IX86)
 using namespace Gen;
 #elif defined(ARM64)
+#include "Core/MIPS/ARM64/Arm64RegCache.h"
 using namespace Arm64Gen;
 using namespace Arm64JitConstants;
 #endif
@@ -595,7 +597,7 @@ void JitBlockCache::DestroyBlock(int block_num, bool invalidate) {
 	ARMXEmitter emit((u8 *)b->checkedEntry);
 	emit.MOVI2R(R0, b->originalAddress);
 	emit.STR(R0, CTXREG, offsetof(MIPSState, pc));
-	emit.B(MIPSComp::jit->dispatcher);
+	emit.B(MIPSComp::jit->GetDispatcher());
 	emit.FlushIcache();
 
 #elif defined(_M_IX86) || defined(_M_X64)
@@ -615,7 +617,7 @@ void JitBlockCache::DestroyBlock(int block_num, bool invalidate) {
 	ARM64XEmitter emit((u8 *)b->checkedEntry);
 	emit.MOVI2R(SCRATCH1, b->originalAddress);
 	emit.STR(INDEX_UNSIGNED, SCRATCH1, CTXREG, offsetof(MIPSState, pc));
-	emit.B(MIPSComp::jit->dispatcher);
+	emit.B(MIPSComp::jit->GetDispatcher());
 	emit.FlushIcache();
 
 #endif

Core/MIPS/JitCommon/JitCommon.cpp

@@ -18,6 +18,7 @@
 #include <stdlib.h>
 
 #include "Core/MIPS/JitCommon/JitCommon.h"
+#include "Core/MIPS/JitCommon/JitState.h"
 #include "Core/MIPS/JitCommon/NativeJit.h"
 #include "Common/StringUtils.h"
 
@@ -29,23 +30,6 @@
 #define DISASM_ALL 1
 #endif
 
-namespace MIPSComp {
-#if defined(ARM)
-	ArmJit *jit;
-#elif defined(ARM64)
-	Arm64Jit *jit;
-#elif defined(_M_IX86) || defined(_M_X64)
-	Jit *jit;
-#elif defined(MIPS)
-	MipsJit *jit;
-#else
-	FakeJit *jit;
-#endif
-	void JitAt() {
-		jit->Compile(currentMIPS->pc);
-	}
-}
-
 #if defined(ARM) || defined(DISASM_ALL)
 // We compile this for x86 as well because it may be useful when developing the ARM JIT on a PC.
 std::vector<std::string> DisassembleArm2(const u8 *data, int size) {

Core/MIPS/JitCommon/JitState.h

@@ -19,8 +19,10 @@
 #pragma once
 
 #include "Common/Common.h"
+#include "Core/MIPS/MIPS.h"
 
 struct JitBlock;
+class JitBlockCache;
 
 namespace MIPSComp {
 
@@ -203,4 +205,6 @@ namespace MIPSComp {
 		bool continueJumps;
 		int continueMaxInstructions;
 	};
+
 }
+

Core/MIPS/JitCommon/NativeJit.cpp

@@ -0,0 +1,53 @@
+// Copyright (c) 2012- PPSSPP Project.
+
+// This program is free software: you can redistribute it and/or modify
+// it under the terms of the GNU General Public License as published by
+// the Free Software Foundation, version 2.0 or later versions.
+
+// This program is distributed in the hope that it will be useful,
+// but WITHOUT ANY WARRANTY; without even the implied warranty of
+// MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+// GNU General Public License 2.0 for more details.
+
+// A copy of the GPL 2.0 should have been included with the program.
+// If not, see http://www.gnu.org/licenses/
+
+// Official git repository and contact information can be found at
+// https://github.com/hrydgard/ppsspp and http://www.ppsspp.org/.
+
+#include "Core/MIPS/JitCommon/NativeJit.h"
+#include "Core/MIPS/JitCommon/JitState.h"
+
+#if defined(ARM)
+#include "../ARM/ArmJit.h"
+#elif defined(ARM64)
+#include "../ARM64/Arm64Jit.h"
+#elif defined(_M_IX86) || defined(_M_X64)
+#include "../x86/Jit.h"
+#elif defined(MIPS)
+#include "../MIPS/MipsJit.h"
+#else
+#include "../fake/FakeJit.h"
+#endif
+
+namespace MIPSComp {
+	JitInterface *jit;
+	void JitAt() {
+		jit->Compile(currentMIPS->pc);
+	}
+
+JitInterface *CreateNativeJit(MIPSState *mips) {
+#if defined(ARM)
+	return new MIPSComp::ArmJit(mips);
+#elif defined(ARM64)
+	return new MIPSComp::Arm64Jit(mips);
+#elif defined(_M_IX86) || defined(_M_X64)
+	return new MIPSComp::Jit(mips);
+#elif defined(MIPS)
+	return new MIPSComp::MipsJit(mips);
+#else
+	return new MIPSComp::FakeJit(mips);
+#endif
+}
+
+}

Core/MIPS/JitCommon/NativeJit.h

@@ -17,32 +17,110 @@
 
 #pragma once
 
+#include <string>
+#include "Common/CommonTypes.h"
+#include "Core/MIPS/MIPS.h"
+
 struct JitBlock;
+class JitBlockCache;
+class PointerWrap;
 
 #ifdef USING_QT_UI
 #undef emit
 #endif
 
-#if defined(ARM)
-#include "../ARM/ArmJit.h"
-typedef MIPSComp::ArmJit NativeJit;
-#elif defined(ARM64)
-#include "../ARM64/Arm64Jit.h"
-typedef MIPSComp::Arm64Jit NativeJit;
-#elif defined(_M_IX86) || defined(_M_X64)
-#include "../x86/Jit.h"
-typedef MIPSComp::Jit NativeJit;
-#elif defined(MIPS)
-#include "../MIPS/MipsJit.h"
-typedef MIPSComp::MipsJit NativeJit;
-#else
-#include "../fake/FakeJit.h"
-typedef MIPSComp::FakeJit NativeJit;
-#endif
+class MIPSState;
 
 namespace MIPSComp {
-	extern NativeJit *jit;
 
-	typedef void (NativeJit::*MIPSCompileFunc)(MIPSOpcode opcode);
-	typedef int (NativeJit::*MIPSReplaceFunc)();
+	class JitInterface {
+	public:
+		virtual ~JitInterface() {}
+
+		virtual bool DescribeCodePtr(const u8 *ptr, std::string &name) = 0;
+		virtual const u8 *GetDispatcher() const = 0;
+		virtual JitBlockCache *GetBlockCache() = 0;
+		virtual void InvalidateCache() = 0;
+		virtual void InvalidateCacheAt(u32 em_address, int length = 4) = 0;
+		virtual void DoState(PointerWrap &p) = 0;
+		virtual void DoDummyState(PointerWrap &p) = 0;
+		virtual void RunLoopUntil(u64 globalticks) = 0;
+		virtual void Compile(u32 em_address) = 0;
+		virtual void ClearCache() = 0;
+		virtual void EatPrefix() = 0;
+
+		virtual void Comp_Generic(MIPSOpcode op) = 0;
+		virtual void Comp_RunBlock(MIPSOpcode op) = 0;
+		virtual void Comp_ReplacementFunc(MIPSOpcode op) = 0;
+		virtual void Comp_ITypeMem(MIPSOpcode op) = 0;
+		virtual void Comp_Cache(MIPSOpcode op) = 0;
+		virtual void Comp_RelBranch(MIPSOpcode op) = 0;
+		virtual void Comp_RelBranchRI(MIPSOpcode op) = 0;
+		virtual void Comp_FPUBranch(MIPSOpcode op) = 0;
+		virtual void Comp_FPULS(MIPSOpcode op) = 0;
+		virtual void Comp_FPUComp(MIPSOpcode op) = 0;
+		virtual void Comp_Jump(MIPSOpcode op) = 0;
+		virtual void Comp_JumpReg(MIPSOpcode op) = 0;
+		virtual void Comp_Syscall(MIPSOpcode op) = 0;
+		virtual void Comp_Break(MIPSOpcode op) = 0;
+		virtual void Comp_IType(MIPSOpcode op) = 0;
+		virtual void Comp_RType2(MIPSOpcode op) = 0;
+		virtual void Comp_RType3(MIPSOpcode op) = 0;
+		virtual void Comp_ShiftType(MIPSOpcode op) = 0;
+		virtual void Comp_Allegrex(MIPSOpcode op) = 0;
+		virtual void Comp_Allegrex2(MIPSOpcode op) = 0;
+		virtual void Comp_VBranch(MIPSOpcode op) = 0;
+		virtual void Comp_MulDivType(MIPSOpcode op) = 0;
+		virtual void Comp_Special3(MIPSOpcode op) = 0;
+		virtual void Comp_FPU3op(MIPSOpcode op) = 0;
+		virtual void Comp_FPU2op(MIPSOpcode op) = 0;
+		virtual void Comp_mxc1(MIPSOpcode op) = 0;
+		virtual void Comp_SV(MIPSOpcode op) = 0;
+		virtual void Comp_SVQ(MIPSOpcode op) = 0;
+		virtual void Comp_VPFX(MIPSOpcode op) = 0;
+		virtual void Comp_VVectorInit(MIPSOpcode op) = 0;
+		virtual void Comp_VMatrixInit(MIPSOpcode op) = 0;
+		virtual void Comp_VDot(MIPSOpcode op) = 0;
+		virtual void Comp_VecDo3(MIPSOpcode op) = 0;
+		virtual void Comp_VV2Op(MIPSOpcode op) = 0;
+		virtual void Comp_Mftv(MIPSOpcode op) = 0;
+		virtual void Comp_Vmfvc(MIPSOpcode op) = 0;
+		virtual void Comp_Vmtvc(MIPSOpcode op) = 0;
+		virtual void Comp_Vmmov(MIPSOpcode op) = 0;
+		virtual void Comp_VScl(MIPSOpcode op) = 0;
+		virtual void Comp_Vmmul(MIPSOpcode op) = 0;
+		virtual void Comp_Vmscl(MIPSOpcode op) = 0;
+		virtual void Comp_Vtfm(MIPSOpcode op) = 0;
+		virtual void Comp_VHdp(MIPSOpcode op) = 0;
+		virtual void Comp_VCrs(MIPSOpcode op) = 0;
+		virtual void Comp_VDet(MIPSOpcode op) = 0;
+		virtual void Comp_Vi2x(MIPSOpcode op) = 0;
+		virtual void Comp_Vx2i(MIPSOpcode op) = 0;
+		virtual void Comp_Vf2i(MIPSOpcode op) = 0;
+		virtual void Comp_Vi2f(MIPSOpcode op) = 0;
+		virtual void Comp_Vh2f(MIPSOpcode op) = 0;
+		virtual void Comp_Vcst(MIPSOpcode op) = 0;
+		virtual void Comp_Vhoriz(MIPSOpcode op) = 0;
+		virtual void Comp_VRot(MIPSOpcode op) = 0;
+		virtual void Comp_VIdt(MIPSOpcode op) = 0;
+		virtual void Comp_Vcmp(MIPSOpcode op) = 0;
+		virtual void Comp_Vcmov(MIPSOpcode op) = 0;
+		virtual void Comp_Viim(MIPSOpcode op) = 0;
+		virtual void Comp_Vfim(MIPSOpcode op) = 0;
+		virtual void Comp_VCrossQuat(MIPSOpcode op) = 0;
+		virtual void Comp_Vsgn(MIPSOpcode op) = 0;
+		virtual void Comp_Vocp(MIPSOpcode op) = 0;
+		virtual void Comp_ColorConv(MIPSOpcode op) = 0;
+		virtual void Comp_Vbfy(MIPSOpcode op) = 0;
+		virtual void Comp_DoNothing(MIPSOpcode op) = 0;
+
+		virtual int Replace_fabsf() = 0;
+	};
+
+	typedef void (JitInterface::*MIPSCompileFunc)(MIPSOpcode opcode);
+	typedef int (JitInterface::*MIPSReplaceFunc)();
+
+	extern JitInterface *jit;
+
+	JitInterface *CreateNativeJit(MIPSState *mips);
 }

Core/MIPS/MIPS.cpp

@@ -209,17 +209,7 @@ void MIPSState::Init() {
 	rng.Init(0x1337);
 
 	if (PSP_CoreParameter().cpuCore == CPU_JIT) {
-#ifdef ARM
-			MIPSComp::jit = new MIPSComp::ArmJit(this);
-#elif defined(ARM64)
-			MIPSComp::jit = new MIPSComp::Arm64Jit(this);
-#elif defined(_M_IX86) || defined(_M_X64)
-			MIPSComp::jit = new MIPSComp::Jit(this);
-#elif defined(MIPS)
-			MIPSComp::jit = new MIPSComp::MipsJit(this);
-#else
-			MIPSComp::jit = new MIPSComp::FakeJit(this);
-#endif
+		MIPSComp::jit = MIPSComp::CreateNativeJit(this);
 	} else {
 		MIPSComp::jit = nullptr;
 	}
@@ -239,17 +229,7 @@ void MIPSState::UpdateCore(CPUCore desired) {
 	case CPU_JIT:
 		INFO_LOG(CPU, "Switching to JIT");
 		if (!MIPSComp::jit) {
-#ifdef ARM
-			MIPSComp::jit = new MIPSComp::ArmJit(this);
-#elif defined(ARM64)
-			MIPSComp::jit = new MIPSComp::Arm64Jit(this);
-#elif defined(_M_IX86) || defined(_M_X64)
-			MIPSComp::jit = new MIPSComp::Jit(this);
-#elif defined(MIPS)
-			MIPSComp::jit = new MIPSComp::MipsJit(this);
-#else
-			MIPSComp::jit = new MIPSComp::FakeJit(this);
-#endif
+			MIPSComp::jit = MIPSComp::CreateNativeJit(this);
 		}
 		break;
 

Core/MIPS/MIPS/MipsJit.h

@@ -31,22 +31,22 @@ using namespace MIPSGen;
 namespace MIPSComp
 {
 
-class MipsJit : public MIPSGen::MIPSCodeBlock
+class MipsJit : public MIPSGen::MIPSCodeBlock, public JitInterface
 {
 public:
 	MipsJit(MIPSState *mips);
 
-	void DoState(PointerWrap &p);
-	static void DoDummyState(PointerWrap &p);
+	void DoState(PointerWrap &p) override;
+	void DoDummyState(PointerWrap &p) override;
 
 	// Compiled ops should ignore delay slots
 	// the compiler will take care of them by itself
 	// OR NOT
-	void Comp_Generic(MIPSOpcode op);
+	void Comp_Generic(MIPSOpcode op) override;
 
-	void RunLoopUntil(u64 globalticks);
+	void RunLoopUntil(u64 globalticks) override;
 
-	void Compile(u32 em_address);	// Compiles a block at current MIPS PC
+	void Compile(u32 em_address) override;	// Compiles a block at current MIPS PC
 	const u8 *DoJit(u32 em_address, JitBlock *b);
 
 	bool DescribeCodePtr(const u8 *ptr, std::string &name);
@@ -55,75 +55,75 @@ public:
 	void EatInstruction(MIPSOpcode op);
 	void AddContinuedBlock(u32 dest);
 
-	void Comp_RunBlock(MIPSOpcode op);
-	void Comp_ReplacementFunc(MIPSOpcode op);
+	void Comp_RunBlock(MIPSOpcode op) override;
+	void Comp_ReplacementFunc(MIPSOpcode op) override;
 
 	// Ops
-	void Comp_ITypeMem(MIPSOpcode op) {}
-	void Comp_Cache(MIPSOpcode op) {}
+	void Comp_ITypeMem(MIPSOpcode op) override {}
+	void Comp_Cache(MIPSOpcode op) override {}
 
-	void Comp_RelBranch(MIPSOpcode op) {}
-	void Comp_RelBranchRI(MIPSOpcode op) {}
-	void Comp_FPUBranch(MIPSOpcode op) {}
-	void Comp_FPULS(MIPSOpcode op) {}
-	void Comp_FPUComp(MIPSOpcode op) {}
-	void Comp_Jump(MIPSOpcode op) {}
-	void Comp_JumpReg(MIPSOpcode op) {}
-	void Comp_Syscall(MIPSOpcode op) {}
-	void Comp_Break(MIPSOpcode op) {}
+	void Comp_RelBranch(MIPSOpcode op) override {}
+	void Comp_RelBranchRI(MIPSOpcode op) override {}
+	void Comp_FPUBranch(MIPSOpcode op) override {}
+	void Comp_FPULS(MIPSOpcode op) override {}
+	void Comp_FPUComp(MIPSOpcode op) override {}
+	void Comp_Jump(MIPSOpcode op) override {}
+	void Comp_JumpReg(MIPSOpcode op) override {}
+	void Comp_Syscall(MIPSOpcode op) override {}
+	void Comp_Break(MIPSOpcode op) override {}
 
-	void Comp_IType(MIPSOpcode op) {}
-	void Comp_RType2(MIPSOpcode op) {}
-	void Comp_RType3(MIPSOpcode op) {}
-	void Comp_ShiftType(MIPSOpcode op) {}
-	void Comp_Allegrex(MIPSOpcode op) {}
-	void Comp_Allegrex2(MIPSOpcode op) {}
-	void Comp_VBranch(MIPSOpcode op) {}
-	void Comp_MulDivType(MIPSOpcode op) {}
-	void Comp_Special3(MIPSOpcode op) {}
+	void Comp_IType(MIPSOpcode op) override {}
+	void Comp_RType2(MIPSOpcode op) override {}
+	void Comp_RType3(MIPSOpcode op) override {}
+	void Comp_ShiftType(MIPSOpcode op) override {}
+	void Comp_Allegrex(MIPSOpcode op) override {}
+	void Comp_Allegrex2(MIPSOpcode op) override {}
+	void Comp_VBranch(MIPSOpcode op) override {}
+	void Comp_MulDivType(MIPSOpcode op) override {}
+	void Comp_Special3(MIPSOpcode op) override {}
 
-	void Comp_FPU3op(MIPSOpcode op) {}
-	void Comp_FPU2op(MIPSOpcode op) {}
-	void Comp_mxc1(MIPSOpcode op) {}
+	void Comp_FPU3op(MIPSOpcode op) override {}
+	void Comp_FPU2op(MIPSOpcode op) override {}
+	void Comp_mxc1(MIPSOpcode op) override {}
 
-	void Comp_DoNothing(MIPSOpcode op) {}
+	void Comp_DoNothing(MIPSOpcode op) override {}
 
-	void Comp_SV(MIPSOpcode op) {}
-	void Comp_SVQ(MIPSOpcode op) {}
-	void Comp_VPFX(MIPSOpcode op) {}
-	void Comp_VVectorInit(MIPSOpcode op) {}
-	void Comp_VMatrixInit(MIPSOpcode op) {}
-	void Comp_VDot(MIPSOpcode op) {}
-	void Comp_VecDo3(MIPSOpcode op) {}
-	void Comp_VV2Op(MIPSOpcode op) {}
-	void Comp_Mftv(MIPSOpcode op) {}
-	void Comp_Vmfvc(MIPSOpcode op) {}
-	void Comp_Vmtvc(MIPSOpcode op) {}
-	void Comp_Vmmov(MIPSOpcode op) {}
-	void Comp_VScl(MIPSOpcode op) {}
-	void Comp_Vmmul(MIPSOpcode op) {}
-	void Comp_Vmscl(MIPSOpcode op) {}
-	void Comp_Vtfm(MIPSOpcode op) {}
-	void Comp_VHdp(MIPSOpcode op) {}
-	void Comp_VCrs(MIPSOpcode op) {}
-	void Comp_VDet(MIPSOpcode op) {}
-	void Comp_Vi2x(MIPSOpcode op) {}
-	void Comp_Vx2i(MIPSOpcode op) {}
-	void Comp_Vf2i(MIPSOpcode op) {}
-	void Comp_Vi2f(MIPSOpcode op) {}
-	void Comp_Vh2f(MIPSOpcode op) {}
-	void Comp_Vcst(MIPSOpcode op) {}
-	void Comp_Vhoriz(MIPSOpcode op) {}
-	void Comp_VRot(MIPSOpcode op) {}
-	void Comp_VIdt(MIPSOpcode op) {}
-	void Comp_Vcmp(MIPSOpcode op) {}
-	void Comp_Vcmov(MIPSOpcode op) {}
-	void Comp_Viim(MIPSOpcode op) {}
-	void Comp_Vfim(MIPSOpcode op) {}
-	void Comp_VCrossQuat(MIPSOpcode op) {}
-	void Comp_Vsgn(MIPSOpcode op) {}
-	void Comp_Vocp(MIPSOpcode op) {}
-	void Comp_ColorConv(MIPSOpcode op) {}
+	void Comp_SV(MIPSOpcode op) override {}
+	void Comp_SVQ(MIPSOpcode op) override {}
+	void Comp_VPFX(MIPSOpcode op) override {}
+	void Comp_VVectorInit(MIPSOpcode op) override {}
+	void Comp_VMatrixInit(MIPSOpcode op) override {}
+	void Comp_VDot(MIPSOpcode op) override {}
+	void Comp_VecDo3(MIPSOpcode op) override {}
+	void Comp_VV2Op(MIPSOpcode op) override {}
+	void Comp_Mftv(MIPSOpcode op) override {}
+	void Comp_Vmfvc(MIPSOpcode op) override {}
+	void Comp_Vmtvc(MIPSOpcode op) override {}
+	void Comp_Vmmov(MIPSOpcode op) override {}
+	void Comp_VScl(MIPSOpcode op) override {}
+	void Comp_Vmmul(MIPSOpcode op) override {}
+	void Comp_Vmscl(MIPSOpcode op) override {}
+	void Comp_Vtfm(MIPSOpcode op) override {}
+	void Comp_VHdp(MIPSOpcode op) override {}
+	void Comp_VCrs(MIPSOpcode op) override {}
+	void Comp_VDet(MIPSOpcode op) override {}
+	void Comp_Vi2x(MIPSOpcode op) override {}
+	void Comp_Vx2i(MIPSOpcode op) override {}
+	void Comp_Vf2i(MIPSOpcode op) override {}
+	void Comp_Vi2f(MIPSOpcode op) override {}
+	void Comp_Vh2f(MIPSOpcode op) override {}
+	void Comp_Vcst(MIPSOpcode op) override {}
+	void Comp_Vhoriz(MIPSOpcode op) override {}
+	void Comp_VRot(MIPSOpcode op) override {}
+	void Comp_VIdt(MIPSOpcode op) override {}
+	void Comp_Vcmp(MIPSOpcode op) override {}
+	void Comp_Vcmov(MIPSOpcode op) override {}
+	void Comp_Viim(MIPSOpcode op) override {}
+	void Comp_Vfim(MIPSOpcode op) override {}
+	void Comp_VCrossQuat(MIPSOpcode op) override {}
+	void Comp_Vsgn(MIPSOpcode op) override {}
+	void Comp_Vocp(MIPSOpcode op) override {}
+	void Comp_ColorConv(MIPSOpcode op) override {}
 	int Replace_fabsf() { return 0; }
 
 	void Comp_Vbfy(MIPSOpcode op) {}

Core/MIPS/MIPSAnalyst.cpp

@@ -25,6 +25,7 @@
 #include "Core/MemMap.h"
 #include "Core/System.h"
 #include "Core/MIPS/MIPS.h"
+#include "Core/MIPS/MIPSVFPUUtils.h"
 #include "Core/MIPS/MIPSTables.h"
 #include "Core/MIPS/MIPSAnalyst.h"
 #include "Core/MIPS/MIPSCodeUtils.h"

Core/MIPS/MIPSTables.cpp

@@ -81,17 +81,7 @@ struct MIPSInstruction {
 #define ENCODING(a) {a}
 #define INSTR(name, comp, dis, inter, flags) {Instruc, name, comp, dis, inter, MIPSInfo(flags)}
 
-#ifdef ARM
-#define JITFUNC(f) (&ArmJit::f)
-#elif defined(ARM64)
-#define JITFUNC(f) (&Arm64Jit::f)
-#elif defined(_M_X64) || defined(_M_IX86)
-#define JITFUNC(f) (&Jit::f)
-#elif defined(MIPS)
-#define JITFUNC(f) (&MipsJit::f)
-#else
-#define JITFUNC(f) (&FakeJit::f)
-#endif
+#define JITFUNC(f) (&JitInterface::f)
 
 using namespace MIPSDis;
 using namespace MIPSInt;

Core/MIPS/MIPSTables.h

@@ -111,7 +111,6 @@ struct MIPSInfo {
 typedef void (CDECL *MIPSDisFunc)(MIPSOpcode opcode, char *out);
 typedef void (CDECL *MIPSInterpretFunc)(MIPSOpcode opcode);
 
-
 void MIPSCompileOp(MIPSOpcode op);
 void MIPSDisAsm(MIPSOpcode op, u32 pc, char *out, bool tabsToSpaces = false);
 MIPSInfo MIPSGetInfo(MIPSOpcode op);
@@ -124,3 +123,4 @@ const char *MIPSGetName(MIPSOpcode op);
 const char *MIPSDisasmAt(u32 compilerPC);
 
 void FillMIPSTables();
+

Core/MIPS/fake/FakeJit.h

@@ -178,8 +178,5 @@ public:
 	const u8 *breakpointBailout;
 };
 
-typedef void (FakeJit::*MIPSCompileFunc)(MIPSOpcode opcode);
-typedef int (FakeJit::*MIPSReplaceFunc)();
-
 }	// namespace MIPSComp
 

Core/MIPS/x86/CompReplace.cpp

@@ -18,6 +18,7 @@
 #include "Core/MemMap.h"
 #include "Core/MIPS/JitCommon/NativeJit.h"
 #include "Core/MIPS/x86/RegCache.h"
+#include "Core/MIPS/x86/Jit.h"
 
 static const u64 MEMORY_ALIGNED16(ssNoSignMask[2]) = {0x7FFFFFFF7FFFFFFFULL, 0x7FFFFFFF7FFFFFFFULL};
 

Core/MIPS/x86/Jit.h

@@ -28,6 +28,7 @@
 #include "Common/x64Emitter.h"
 #include "Core/MIPS/JitCommon/JitBlockCache.h"
 #include "Core/MIPS/JitCommon/JitState.h"
+#include "Core/MIPS/JitCommon/NativeJit.h"
 #include "Core/MIPS/x86/JitSafeMem.h"
 #include "Core/MIPS/x86/RegCache.h"
 #include "Core/MIPS/x86/RegCacheFPU.h"
@@ -45,7 +46,7 @@ struct RegCacheState {
 	FPURegCacheState fpr;
 };
 
-class Jit : public Gen::XCodeBlock {
+class Jit : public Gen::XCodeBlock, public JitInterface {
 public:
 	Jit(MIPSState *mips);
 	virtual ~Jit();
@@ -53,92 +54,92 @@ public:
 	const JitOptions &GetJitOptions() { return jo; }
 
 	void DoState(PointerWrap &p);
-	static void DoDummyState(PointerWrap &p);
+	void DoDummyState(PointerWrap &p);
 
 	// Compiled ops should ignore delay slots
 	// the compiler will take care of them by itself
 	// OR NOT
-	void Comp_Generic(MIPSOpcode op);
+	void Comp_Generic(MIPSOpcode op) override;
 
-	void RunLoopUntil(u64 globalticks);
+	void RunLoopUntil(u64 globalticks) override;
 
-	void Compile(u32 em_address);	// Compiles a block at current MIPS PC
+	void Compile(u32 em_address) override;	// Compiles a block at current MIPS PC
 	const u8 *DoJit(u32 em_address, JitBlock *b);
 
-	bool DescribeCodePtr(const u8 *ptr, std::string &name);
+	bool DescribeCodePtr(const u8 *ptr, std::string &name) override;
 
-	void Comp_RunBlock(MIPSOpcode op);
-	void Comp_ReplacementFunc(MIPSOpcode op);
+	void Comp_RunBlock(MIPSOpcode op) override;
+	void Comp_ReplacementFunc(MIPSOpcode op) override;
 
 	// Ops
-	void Comp_ITypeMem(MIPSOpcode op);
-	void Comp_Cache(MIPSOpcode op);
+	void Comp_ITypeMem(MIPSOpcode op) override;
+	void Comp_Cache(MIPSOpcode op) override;
 
-	void Comp_RelBranch(MIPSOpcode op);
-	void Comp_RelBranchRI(MIPSOpcode op);
-	void Comp_FPUBranch(MIPSOpcode op);
-	void Comp_FPULS(MIPSOpcode op);
-	void Comp_FPUComp(MIPSOpcode op);
-	void Comp_Jump(MIPSOpcode op);
-	void Comp_JumpReg(MIPSOpcode op);
-	void Comp_Syscall(MIPSOpcode op);
-	void Comp_Break(MIPSOpcode op);
+	void Comp_RelBranch(MIPSOpcode op) override;
+	void Comp_RelBranchRI(MIPSOpcode op) override;
+	void Comp_FPUBranch(MIPSOpcode op) override;
+	void Comp_FPULS(MIPSOpcode op) override;
+	void Comp_FPUComp(MIPSOpcode op) override;
+	void Comp_Jump(MIPSOpcode op) override;
+	void Comp_JumpReg(MIPSOpcode op) override;
+	void Comp_Syscall(MIPSOpcode op) override;
+	void Comp_Break(MIPSOpcode op) override;
 
-	void Comp_IType(MIPSOpcode op);
-	void Comp_RType2(MIPSOpcode op);
-	void Comp_RType3(MIPSOpcode op);
-	void Comp_ShiftType(MIPSOpcode op);
-	void Comp_Allegrex(MIPSOpcode op);
-	void Comp_Allegrex2(MIPSOpcode op);
-	void Comp_VBranch(MIPSOpcode op);
-	void Comp_MulDivType(MIPSOpcode op);
-	void Comp_Special3(MIPSOpcode op);
+	void Comp_IType(MIPSOpcode op) override;
+	void Comp_RType2(MIPSOpcode op) override;
+	void Comp_RType3(MIPSOpcode op) override;
+	void Comp_ShiftType(MIPSOpcode op) override;
+	void Comp_Allegrex(MIPSOpcode op) override;
+	void Comp_Allegrex2(MIPSOpcode op) override;
+	void Comp_VBranch(MIPSOpcode op) override;
+	void Comp_MulDivType(MIPSOpcode op) override;
+	void Comp_Special3(MIPSOpcode op) override;
 
-	void Comp_FPU3op(MIPSOpcode op);
-	void Comp_FPU2op(MIPSOpcode op);
-	void Comp_mxc1(MIPSOpcode op);
+	void Comp_FPU3op(MIPSOpcode op) override;
+	void Comp_FPU2op(MIPSOpcode op) override;
+	void Comp_mxc1(MIPSOpcode op) override;
 
-	void Comp_SV(MIPSOpcode op);
-	void Comp_SVQ(MIPSOpcode op);
-	void Comp_VPFX(MIPSOpcode op);
-	void Comp_VVectorInit(MIPSOpcode op);
-	void Comp_VMatrixInit(MIPSOpcode op);
-	void Comp_VDot(MIPSOpcode op);
-	void Comp_VecDo3(MIPSOpcode op);
-	void Comp_VV2Op(MIPSOpcode op);
-	void Comp_Mftv(MIPSOpcode op);
-	void Comp_Vmfvc(MIPSOpcode op);
-	void Comp_Vmtvc(MIPSOpcode op);
-	void Comp_Vmmov(MIPSOpcode op);
-	void Comp_VScl(MIPSOpcode op);
-	void Comp_Vmmul(MIPSOpcode op);
-	void Comp_Vmscl(MIPSOpcode op);
-	void Comp_Vtfm(MIPSOpcode op);
-	void Comp_VHdp(MIPSOpcode op);
-	void Comp_VCrs(MIPSOpcode op);
-	void Comp_VDet(MIPSOpcode op);
-	void Comp_Vi2x(MIPSOpcode op);
-	void Comp_Vx2i(MIPSOpcode op);
-	void Comp_Vf2i(MIPSOpcode op);
-	void Comp_Vi2f(MIPSOpcode op);
-	void Comp_Vh2f(MIPSOpcode op);
-	void Comp_Vcst(MIPSOpcode op);
-	void Comp_Vhoriz(MIPSOpcode op);
-	void Comp_VRot(MIPSOpcode op);
-	void Comp_VIdt(MIPSOpcode op);
-	void Comp_Vcmp(MIPSOpcode op);
-	void Comp_Vcmov(MIPSOpcode op);
-	void Comp_Viim(MIPSOpcode op);
-	void Comp_Vfim(MIPSOpcode op);
-	void Comp_VCrossQuat(MIPSOpcode op);
-	void Comp_Vsgn(MIPSOpcode op);
-	void Comp_Vocp(MIPSOpcode op);
-	void Comp_ColorConv(MIPSOpcode op);
-	void Comp_Vbfy(MIPSOpcode op);
+	void Comp_SV(MIPSOpcode op) override;
+	void Comp_SVQ(MIPSOpcode op) override;
+	void Comp_VPFX(MIPSOpcode op) override;
+	void Comp_VVectorInit(MIPSOpcode op) override;
+	void Comp_VMatrixInit(MIPSOpcode op) override;
+	void Comp_VDot(MIPSOpcode op) override;
+	void Comp_VecDo3(MIPSOpcode op) override;
+	void Comp_VV2Op(MIPSOpcode op) override;
+	void Comp_Mftv(MIPSOpcode op) override;
+	void Comp_Vmfvc(MIPSOpcode op) override;
+	void Comp_Vmtvc(MIPSOpcode op) override;
+	void Comp_Vmmov(MIPSOpcode op) override;
+	void Comp_VScl(MIPSOpcode op) override;
+	void Comp_Vmmul(MIPSOpcode op) override;
+	void Comp_Vmscl(MIPSOpcode op) override;
+	void Comp_Vtfm(MIPSOpcode op) override;
+	void Comp_VHdp(MIPSOpcode op) override;
+	void Comp_VCrs(MIPSOpcode op) override;
+	void Comp_VDet(MIPSOpcode op) override;
+	void Comp_Vi2x(MIPSOpcode op) override;
+	void Comp_Vx2i(MIPSOpcode op) override;
+	void Comp_Vf2i(MIPSOpcode op) override;
+	void Comp_Vi2f(MIPSOpcode op) override;
+	void Comp_Vh2f(MIPSOpcode op) override;
+	void Comp_Vcst(MIPSOpcode op) override;
+	void Comp_Vhoriz(MIPSOpcode op) override;
+	void Comp_VRot(MIPSOpcode op) override;
+	void Comp_VIdt(MIPSOpcode op) override;
+	void Comp_Vcmp(MIPSOpcode op) override;
+	void Comp_Vcmov(MIPSOpcode op) override;
+	void Comp_Viim(MIPSOpcode op) override;
+	void Comp_Vfim(MIPSOpcode op) override;
+	void Comp_VCrossQuat(MIPSOpcode op) override;
+	void Comp_Vsgn(MIPSOpcode op) override;
+	void Comp_Vocp(MIPSOpcode op) override;
+	void Comp_ColorConv(MIPSOpcode op) override;
+	void Comp_Vbfy(MIPSOpcode op) override;
 
-	void Comp_DoNothing(MIPSOpcode op);
+	void Comp_DoNothing(MIPSOpcode op) override;
 
-	int Replace_fabsf();
+	int Replace_fabsf() override;
 
 	void ApplyPrefixST(u8 *vregs, u32 prefix, VectorSize sz);
 	void ApplyPrefixD(const u8 *vregs, VectorSize sz);
@@ -162,14 +163,14 @@ public:
 	JitBlockCache *GetBlockCache() { return &blocks; }
 
 	void ClearCache();
-	void InvalidateCache();
-	inline void InvalidateCacheAt(u32 em_address, int length = 4) {
+	void InvalidateCache() override;
+	void InvalidateCacheAt(u32 em_address, int length = 4) {
 		if (blocks.RangeMayHaveEmuHacks(em_address, em_address + length)) {
 			blocks.InvalidateICache(em_address, length);
 		}
 	}
 
-	const u8 *GetDispatcher() const {
+	const u8 *GetDispatcher() const override {
 		return dispatcher;
 	}
 

Core/MemMap.cpp

@@ -35,6 +35,7 @@
 #include "Core/Debugger/Breakpoints.h"
 #include "Core/Config.h"
 #include "Core/HLE/ReplaceTables.h"
+#include "Core/MIPS/JitCommon/JitBlockCache.h"
 
 namespace Memory {
 

Core/SaveState.cpp

@@ -41,6 +41,7 @@
 #include "Core/HLE/sceKernel.h"
 #include "Core/MemMap.h"
 #include "Core/MIPS/MIPS.h"
+#include "Core/MIPS/JitCommon/JitBlockCache.h"
 #include "HW/MemoryStick.h"
 #include "GPU/GPUState.h"
 #include "UI/OnScreenDisplay.h"

UI/DevScreens.cpp

@@ -35,6 +35,7 @@
 #include "Core/CoreParameter.h"
 #include "Core/MIPS/MIPSTables.h"
 #include "Core/MIPS/JitCommon/NativeJit.h"
+#include "Core/MIPS/JitCommon/JitBlockCache.h"
 #include "Core/MIPS/JitCommon/JitCommon.h"
 #include "GPU/GPUInterface.h"
 #include "GPU/GPUState.h"

android/jni/Android.mk

@@ -357,6 +357,7 @@ EXEC_AND_LIB_FILES := \
   $(SRC)/Core/MIPS/JitCommon/JitCommon.cpp \
   $(SRC)/Core/MIPS/JitCommon/JitBlockCache.cpp \
   $(SRC)/Core/MIPS/JitCommon/JitState.cpp \
+  $(SRC)/Core/MIPS/JitCommon/NativeJit.cpp \
   $(SRC)/Core/Util/AudioFormat.cpp \
   $(SRC)/Core/Util/GameManager.cpp \
   $(SRC)/Core/Util/BlockAllocator.cpp \

unittest/JitHarness.cpp

@@ -21,6 +21,7 @@
 #include "base/NativeApp.h"
 #include "input/input_state.h"
 #include "Core/MIPS/JitCommon/JitCommon.h"
+#include "Core/MIPS/JitCommon/JitBlockCache.h"
 #include "Core/MIPS/JitCommon/NativeJit.h"
 #include "Core/MIPS/MIPSCodeUtils.h"
 #include "Core/MIPS/MIPSDebugInterface.h"