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jit: Increase the cycle cost of VFPU ops.
It seems like they all take at least 2 cycles, which kinda makes sense.
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@@ -521,8 +521,8 @@ const MIPSInstruction tableCop1W[64] = // 010001 10100 ..... ..... ..... xxxxxx
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const MIPSInstruction tableVFPU0[8] = // 011000 xxx ....... . ....... . .......
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{
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INSTR("vadd", JITFUNC(Comp_VecDo3), Dis_VectorSet3, Int_VecDo3, IN_OTHER|OUT_OTHER|IS_VFPU|OUT_EAT_PREFIX),
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INSTR("vsub", JITFUNC(Comp_VecDo3), Dis_VectorSet3, Int_VecDo3, IN_OTHER|OUT_OTHER|IS_VFPU|OUT_EAT_PREFIX),
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INSTR("vadd", JITFUNC(Comp_VecDo3), Dis_VectorSet3, Int_VecDo3, MIPSInfo(IN_OTHER|OUT_OTHER|IS_VFPU|OUT_EAT_PREFIX, 2)),
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INSTR("vsub", JITFUNC(Comp_VecDo3), Dis_VectorSet3, Int_VecDo3, MIPSInfo(IN_OTHER|OUT_OTHER|IS_VFPU|OUT_EAT_PREFIX, 2)),
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// TODO: Disasm is wrong.
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INSTR("vsbn", JITFUNC(Comp_Generic), Dis_VectorSet3, Int_Vsbn, IN_OTHER|OUT_OTHER|IS_VFPU|OUT_EAT_PREFIX),
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INVALID, INVALID, INVALID, INVALID,
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@@ -1049,7 +1049,8 @@ MIPSInterpretFunc MIPSGetInterpretFunc(MIPSOpcode op)
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// TODO: Do something that makes sense here.
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int MIPSGetInstructionCycleEstimate(MIPSOpcode op)
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{
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return 1;
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MIPSInfo info = MIPSGetInfo(op);
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return info.cycles;
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}
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const char *MIPSDisasmAt(u32 compilerPC) {
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