Merge pull request #484 from unknownbrackets/jit-jr-tweak

Avoid some memory writes on jr in jit

Core/MIPS/MIPSAnalyst.cpp

@@ -85,6 +85,12 @@ namespace MIPSAnalyst
 		}
 	}
 
+	bool IsSyscall(u32 op)
+	{
+		// Syscalls look like this: 0000 00-- ---- ---- ---- --00 1100
+		return (op >> 26) == 0 && (op & 0x3f) == 12;
+	}
+
 	void Analyze(u32 address)
 	{
 		//set everything to -1 (FF)

Core/MIPS/MIPSAnalyst.h

@@ -57,6 +57,7 @@ namespace MIPSAnalyst
 	int GetOutReg(u32 op);
 	bool ReadsFromReg(u32 op, u32 reg);
 	bool IsDelaySlotNice(u32 branch, u32 delayslot);
+	bool IsSyscall(u32 op);
 
 
 }	// namespace MIPSAnalyst

Core/MIPS/x86/CompBranch.cpp

@@ -451,7 +451,18 @@ void Jit::Comp_JumpReg(u32 op)
 	// Do what with that information?
 	delaySlotIsNice = false;	// Until we have time to fully fix this
 
-	if (delaySlotIsNice)
+	if (IsSyscall(delaySlotOp))
+	{
+		// If this is a syscall, write the pc (for thread switching and other good reasons.)
+		gpr.BindToRegister(rs, true, false);
+		MOV(32, M(&currentMIPS->pc), gpr.R(rs));
+		CompileDelaySlot(false);
+
+		// Syscalls write the exit code for us.
+		_dbg_assert_msg_(JIT, !js.compiling, "Expected syscall to write an exit code.");
+		return;
+	}
+	else if (delaySlotIsNice)
 	{
 		// TODO: This flushes which is a waste, could add an extra param to skip.
 		CompileDelaySlot(false);
@@ -460,18 +471,10 @@ void Jit::Comp_JumpReg(u32 op)
 	}
 	else
 	{
-		// Latch destination now - save it on the stack.
+		// Latch destination now - save it in memory.
 		gpr.BindToRegister(rs, true, false);
-		MOV(32, M(&currentMIPS->pc), gpr.R(rs));	// for syscalls in delay slot - could be avoided
 		MOV(32, M(&savedPC), gpr.R(rs));
 		CompileDelaySlot(false);
-
-		if (!js.compiling)
-		{
-			// Oh, there was a syscall in the delay slot
-			// It took care of writing the exit code for us.
-			return;
-		}
 		MOV(32, R(EAX), M(&savedPC));
 	}