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3rdparty: Update CPUInfo to commit b1a5d63

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This commit is contained in:
JordanTheToaster
2026-07-04 06:53:00 +01:00
committed by lightningterror
parent 8c1b3f8ce3
commit c3e63d5a0e
10 changed files with 137 additions and 16 deletions
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3rdparty/cpuinfo/include/cpuinfo.h
Vendored
+2
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@@ -361,6 +361,8 @@ enum cpuinfo_uarch {
cpuinfo_uarch_raptor_cove = 0x0010020F,
/** Intel Redwood Cove microarchitecture (Granite Rapids). */
cpuinfo_uarch_redwood_cove = 0x00100210,
/** Intel Coyote Cove microarchitecture. */
cpuinfo_uarch_coyote_cove = 0x00100211,
/** Pentium 4 with Willamette, Northwood, or Foster cores. */
cpuinfo_uarch_willamette = 0x00100300,
3rdparty/cpuinfo/src/api.c
Vendored
+3
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@@ -1,3 +1,6 @@
/* for syscall() */
#define _DEFAULT_SOURCE
#include <stdbool.h>
#include <stddef.h>
3rdparty/cpuinfo/src/arm/api.h
Vendored
+2
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@@ -36,6 +36,7 @@ enum cpuinfo_arm_chipset_vendor {
cpuinfo_arm_chipset_vendor_texas_instruments,
cpuinfo_arm_chipset_vendor_unisoc,
cpuinfo_arm_chipset_vendor_wondermedia,
cpuinfo_arm_chipset_vendor_google,
cpuinfo_arm_chipset_vendor_max,
};
@@ -73,6 +74,7 @@ enum cpuinfo_arm_chipset_series {
cpuinfo_arm_chipset_series_unisoc_t,
cpuinfo_arm_chipset_series_unisoc_ums,
cpuinfo_arm_chipset_series_wondermedia_wm,
cpuinfo_arm_chipset_series_google_tensor,
cpuinfo_arm_chipset_series_max,
};
3rdparty/cpuinfo/src/arm/linux/api.h
Vendored
+1 -1
View File
@@ -366,7 +366,7 @@ CPUINFO_INTERNAL struct cpuinfo_arm_chipset cpuinfo_arm_android_decode_chipset_f
CPUINFO_INTERNAL struct cpuinfo_arm_chipset cpuinfo_arm_android_decode_chipset_from_ro_hardware_chipname(
const char ro_hardware_chipname[restrict static CPUINFO_BUILD_PROP_VALUE_MAX]);
CPUINFO_INTERNAL struct cpuinfo_arm_chipset cpuinfo_arm_android_decode_chipset_from_ro_soc_model(
const char ro_soc_model[restrict static CPUINFO_BUILD_PROP_VALUE_MAX]);
const char soc_model[restrict static CPUINFO_BUILD_PROP_VALUE_MAX]);
#else
CPUINFO_INTERNAL struct cpuinfo_arm_chipset cpuinfo_arm_linux_decode_chipset_from_proc_cpuinfo_revision(
const char proc_cpuinfo_revision[restrict static CPUINFO_REVISION_VALUE_MAX]);
3rdparty/cpuinfo/src/arm/linux/chipset.c
Vendored
+61 -10
View File
@@ -3492,9 +3492,20 @@ struct cpuinfo_arm_chipset cpuinfo_arm_android_decode_chipset_from_ro_chipname(
};
}
/*
* Decodes chipset name from ro.soc.model Android system property.
*
* @param[in] soc_model - ro.soc.model value.
*
* @returns Decoded chipset name. If chipset could not be decoded, the resulting
* structure would use `unknown` vendor and series identifiers.
*/
struct cpuinfo_arm_chipset cpuinfo_arm_android_decode_chipset_from_ro_soc_model(
const char soc_model[restrict static CPUINFO_BUILD_PROP_VALUE_MAX]) {
struct cpuinfo_arm_chipset chipset;
struct cpuinfo_arm_chipset chipset = {
.vendor = cpuinfo_arm_chipset_vendor_unknown,
.series = cpuinfo_arm_chipset_series_unknown,
};
const size_t soc_model_length = strnlen(soc_model, CPUINFO_BUILD_PROP_VALUE_MAX);
const char* soc_model_end = soc_model + soc_model_length;
@@ -3516,10 +3527,28 @@ struct cpuinfo_arm_chipset cpuinfo_arm_android_decode_chipset_from_ro_soc_model(
return chipset;
}
return (struct cpuinfo_arm_chipset){
.vendor = cpuinfo_arm_chipset_vendor_unknown,
.series = cpuinfo_arm_chipset_series_unknown,
};
if (soc_model[0] != '\0') {
if (strncmp(soc_model, "Tensor", 6) == 0) {
chipset.vendor = cpuinfo_arm_chipset_vendor_google;
chipset.series = cpuinfo_arm_chipset_series_google_tensor;
const char* suffix_start = soc_model + 6;
while (*suffix_start == ' ') {
suffix_start++;
}
const size_t suffix_length = strnlen(suffix_start, CPUINFO_ARM_CHIPSET_SUFFIX_MAX);
if (suffix_length > 0) {
strncpy(chipset.suffix, suffix_start, suffix_length);
}
return chipset;
} else if (strncmp(soc_model, "GS201", 5) == 0) {
chipset.vendor = cpuinfo_arm_chipset_vendor_google;
chipset.series = cpuinfo_arm_chipset_series_google_tensor;
strncpy(chipset.suffix, "G2", 2);
return chipset;
}
}
return chipset;
}
#endif /* __ANDROID__ */
@@ -3858,6 +3887,7 @@ static const char* chipset_vendor_string[cpuinfo_arm_chipset_vendor_max] = {
[cpuinfo_arm_chipset_vendor_texas_instruments] = "Texas Instruments",
[cpuinfo_arm_chipset_vendor_unisoc] = "Unisoc",
[cpuinfo_arm_chipset_vendor_wondermedia] = "WonderMedia",
[cpuinfo_arm_chipset_vendor_google] = "Google",
};
/* Map from ARM chipset series ID to its string representation */
@@ -3895,6 +3925,7 @@ static const char* chipset_series_string[cpuinfo_arm_chipset_series_max] = {
[cpuinfo_arm_chipset_series_unisoc_t] = "T",
[cpuinfo_arm_chipset_series_unisoc_ums] = "UMS",
[cpuinfo_arm_chipset_series_wondermedia_wm] = "WM",
[cpuinfo_arm_chipset_series_google_tensor] = "Tensor",
};
/* Convert chipset name represented by cpuinfo_arm_chipset structure to a string
@@ -3913,14 +3944,35 @@ void cpuinfo_arm_chipset_to_string(
const char* vendor_string = chipset_vendor_string[vendor];
const char* series_string = chipset_series_string[series];
const uint32_t model = chipset->model;
const size_t suffix_length = strnlen(chipset->suffix, CPUINFO_ARM_CHIPSET_SUFFIX_MAX);
if (model == 0) {
if (series == cpuinfo_arm_chipset_series_unknown) {
strncpy(name, vendor_string, CPUINFO_ARM_CHIPSET_NAME_MAX);
if (suffix_length > 0) {
if (series == cpuinfo_arm_chipset_series_unknown) {
snprintf(
name,
CPUINFO_ARM_CHIPSET_NAME_MAX,
"%s %.*s",
vendor_string,
(int)suffix_length,
chipset->suffix);
} else {
snprintf(
name,
CPUINFO_ARM_CHIPSET_NAME_MAX,
"%s %s %.*s",
vendor_string,
series_string,
(int)suffix_length,
chipset->suffix);
}
} else {
snprintf(name, CPUINFO_ARM_CHIPSET_NAME_MAX, "%s %s", vendor_string, series_string);
if (series == cpuinfo_arm_chipset_series_unknown) {
strncpy(name, vendor_string, CPUINFO_ARM_CHIPSET_NAME_MAX);
} else {
snprintf(name, CPUINFO_ARM_CHIPSET_NAME_MAX, "%s %s", vendor_string, series_string);
}
}
} else {
const size_t suffix_length = strnlen(chipset->suffix, CPUINFO_ARM_CHIPSET_SUFFIX_MAX);
snprintf(
name,
CPUINFO_ARM_CHIPSET_NAME_MAX,
@@ -4051,7 +4103,6 @@ static enum cpuinfo_arm_chipset_vendor disambiguate_chipset_vendor(
(vendor_a == cpuinfo_arm_chipset_vendor_spreadtrum && vendor_b == cpuinfo_arm_chipset_vendor_unisoc)) {
return cpuinfo_arm_chipset_vendor_unisoc;
}
return cpuinfo_arm_chipset_vendor_unknown;
}
3rdparty/cpuinfo/src/arm/linux/init.c
Vendored
+3 -3
View File
@@ -256,12 +256,12 @@ void cpuinfo_arm_linux_init(void) {
}
#if defined(__ANDROID__)
struct cpuinfo_android_properties android_properties;
struct cpuinfo_android_properties android_properties = {0};
cpuinfo_arm_android_parse_properties(&android_properties);
#else
char proc_cpuinfo_hardware[CPUINFO_HARDWARE_VALUE_MAX];
char proc_cpuinfo_hardware[CPUINFO_HARDWARE_VALUE_MAX] = {0};
#endif
char proc_cpuinfo_revision[CPUINFO_REVISION_VALUE_MAX];
char proc_cpuinfo_revision[CPUINFO_REVISION_VALUE_MAX] = {0};
if (!cpuinfo_arm_linux_parse_proc_cpuinfo(
#if defined(__ANDROID__)
3rdparty/cpuinfo/src/arm/uarch.c
Vendored
+49
View File
@@ -11,6 +11,11 @@ void cpuinfo_arm_decode_vendor_uarch(
#endif /* CPUINFO_ARCH_ARM */
enum cpuinfo_vendor vendor[RESTRICT_STATIC 1],
enum cpuinfo_uarch uarch[RESTRICT_STATIC 1]) {
/* Ensure the out-parameters are always initialized, including for
* implementers that are not handled in the switch below. */
*vendor = cpuinfo_vendor_unknown;
*uarch = cpuinfo_uarch_unknown;
switch (midr_get_implementer(midr)) {
case 'A':
*vendor = cpuinfo_vendor_arm;
@@ -438,6 +443,50 @@ void cpuinfo_arm_decode_vendor_uarch(
midr_get_part(midr));
}
break;
case 'a':
*vendor = cpuinfo_vendor_apple;
switch (midr_get_part(midr)) {
case 0x022:
case 0x024:
case 0x028:
*uarch = cpuinfo_uarch_icestorm;
break;
case 0x023:
case 0x025:
case 0x029:
*uarch = cpuinfo_uarch_firestorm;
break;
case 0x032:
case 0x034:
case 0x038:
*uarch = cpuinfo_uarch_blizzard;
break;
case 0x033:
case 0x035:
case 0x039:
*uarch = cpuinfo_uarch_avalanche;
break;
case 0x042:
case 0x044:
case 0x048:
*uarch = cpuinfo_uarch_coll_sawtooth;
break;
case 0x043:
case 0x045:
case 0x049:
*uarch = cpuinfo_uarch_coll_everest;
break;
case 0x052:
*uarch = cpuinfo_uarch_donan_sawtooth;
break;
case 0x053:
*uarch = cpuinfo_uarch_donan_everest;
break;
default:
cpuinfo_log_warning(
"unknown Apple CPU part 0x%03" PRIx32 " ignored", midr_get_part(midr));
}
break;
#if CPUINFO_ARCH_ARM
case 'V':
*vendor = cpuinfo_vendor_marvell;
3rdparty/cpuinfo/src/x86/name.c
Vendored
+9
View File
@@ -307,6 +307,15 @@ static bool transform_token(char* token_start, char* token_end, struct parser_st
}
break;
case 4:
/*
* Erase everything starting with "with" on AMD
* processors, e.g. "AMD Ryzen 5 PRO 6650U with Radeon
* Graphics"
*/
if (erase_matching(token_start, token_length, "with")) {
return false;
}
/* Remember to erase "Dual Core" in "AMD Athlon(tm) 64
* X2 Dual Core Processor 3800+" */
if (memcmp(token_start, "Dual", token_length) == 0) {
3rdparty/cpuinfo/src/x86/uarch.c
Vendored
+7
View File
@@ -270,8 +270,15 @@ enum cpuinfo_uarch cpuinfo_x86_decode_uarch(
return cpuinfo_uarch_prescott;
}
break;
case 0x12:
switch (model_info->model) {
case 0x01: // Nova Lake P-core (Coyote Cove)
return cpuinfo_uarch_coyote_cove;
}
break;
}
break;
case cpuinfo_vendor_amd:
switch (model_info->family) {
#if CPUINFO_ARCH_X86
3rdparty/cpuinfo/src/x86/windows/init.c
Vendored
-2
View File
@@ -265,8 +265,6 @@ BOOL CALLBACK cpuinfo_x86_windows_init(PINIT_ONCE init_once, PVOID parameter, PV
* APIC order */
const uint32_t core_id = cores_count++;
uint32_t smt_id = 0;
/* Reconstruct core part of APIC ID */
const uint32_t core_apic_id = (core_id & core_bits_mask) << x86_processor.topology.core_bits_offset;
/* Iterate processor groups and set the core & SMT parts of APIC
* ID */
for (uint32_t i = 0; i < core_info->Processor.GroupCount; i++) {