More work on cycles. FPU is slower than assumed earlier.

Also added COP0 DIE bit handling, that disables the EE's dual issue capabilities.

git-svn-id: http://pcsx2.googlecode.com/svn/trunk@1029 96395faa-99c1-11dd-bbfe-3dabce05a288
This commit is contained in:
ramapcsx2 committed 2009-04-20 01:40:13 +00:00
1 parent b21b81df9f
commit 3ee59f3f4e
2 files changed
+6 -5

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+4 -4
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@@ -106,7 +106,7 @@ namespace R5900
static const int MMI_Div = 22*8;
static const int MMI_Default = 14;
static const int FPU_Mult = 12;
static const int FPU_Mult = 4*8;
static const int Store = 8;
static const int Load = 8;
@@ -432,9 +432,9 @@ namespace R5900
MakeOpcode1( MIN_S, CopDefault );
MakeOpcode1( MUL_S, FPU_Mult );
MakeOpcode1( DIV_S, 3*8 );
MakeOpcode1( SQRT_S, 3*8 );
MakeOpcode1( RSQRT_S, 4*8 );
MakeOpcode1( DIV_S, 6*8 );
MakeOpcode1( SQRT_S, 6*8 );
MakeOpcode1( RSQRT_S, 8*8 );
MakeOpcode1( MULA_S, FPU_Mult );
MakeOpcode1( MADD_S, FPU_Mult );
MakeOpcode1( MSUB_S, FPU_Mult );
+2 -1
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@@ -1289,7 +1289,8 @@ void recompileNextInstruction(int delayslot)
return;
}
}
s_nBlockCycles += opcode.cycles;
//If thh COP0 DIE bit is disabled, double the cycles. Happens rarely.
s_nBlockCycles += opcode.cycles * (2 - ((cpuRegs.CP0.n.Config >> 18) & 0x1));
opcode.recompile();
}