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fix flush mode

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This commit is contained in:
Logan McNaughton
2023-10-10 20:03:13 -06:00
parent e2995d5b59
commit c75c1e780c
2 changed files with 21 additions and 0 deletions
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src/device.rs
+1
View File
@@ -107,6 +107,7 @@ impl Device {
cop1: cop1::Cop1 {
fcr0: 0,
fcr31: 0,
flush_mode: 0,
fgr32: [[0; 4]; 32],
fgr64: [[0; 8]; 32],
instrs: [cop1::reserved; 32],
src/device/cop1.rs
+20
View File
@@ -17,6 +17,7 @@ use crate::device;
//pub const FCR31_CAUSE_INVALID_BIT: u32 = 1 << 16;
pub const FCR31_CAUSE_UNIMP_BIT: u32 = 1 << 17;
pub const FCR31_CMP_BIT: u32 = 1 << 23;
pub const FCR31_FS_BIT: u32 = 1 << 24;
pub const FCR31_CAUSE_MASK: u32 = 0b00000000000000111111000000000000;
pub const FCR31_ENABLE_MASK: u32 = 0b00000000000000000000111110000000;
@@ -25,6 +26,7 @@ pub const FCR31_WRITE_MASK: u32 = 0b00000001100000111111111111111111;
pub struct Cop1 {
pub fcr0: u32,
pub fcr31: u32,
pub flush_mode: u32,
pub fgr32: [[u8; 4]; 32],
pub fgr64: [[u8; 8]; 32],
pub instrs: [fn(&mut device::Device, u32); 32],
@@ -364,6 +366,24 @@ pub fn set_control_registers_fpu(device: &mut device::Device, index: u32, data:
{
device::exceptions::floating_point_exception(device)
}
unsafe {
let flush_mode;
if (device.cpu.cop1.fcr31 & 2) != 0 {
if (device.cpu.cop1.fcr31 & FCR31_FS_BIT) != 0 {
flush_mode = std::arch::x86_64::_MM_FLUSH_ZERO_OFF
} else {
flush_mode = std::arch::x86_64::_MM_FLUSH_ZERO_ON;
}
} else {
flush_mode = std::arch::x86_64::_MM_FLUSH_ZERO_ON;
}
if flush_mode != device.cpu.cop1.flush_mode {
#[allow(deprecated)]
std::arch::x86_64::_MM_SET_FLUSH_ZERO_MODE(flush_mode);
device.cpu.cop1.flush_mode = flush_mode;
}
}
}
_ => {
panic!("unknown FCR register")