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https://github.com/gopher64/gopher64.git
synced 2026-11-12 09:09:01 +01:00
Clippy fixes (#99)
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2c60f6bf81
commit
415c3eca40
9 files changed
+20
-29
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+2
-2
@@ -89,7 +89,7 @@ fn swap_rom(contents: Vec<u8>) -> Vec<u8> {
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fn get_rom_contents(file_path: &std::path::Path) -> Vec<u8> {
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let mut contents = vec![];
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if file_path.extension().unwrap().to_ascii_lowercase() == "zip" {
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if file_path.extension().unwrap().eq_ignore_ascii_case("zip") {
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let zip_file = fs::File::open(file_path).unwrap();
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let mut archive = zip::ZipArchive::new(zip_file).unwrap();
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for i in 0..archive.len() {
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@@ -106,7 +106,7 @@ fn get_rom_contents(file_path: &std::path::Path) -> Vec<u8> {
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break;
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}
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}
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} else if file_path.extension().unwrap().to_ascii_lowercase() == "7z" {
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} else if file_path.extension().unwrap().eq_ignore_ascii_case("7z") {
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let mut archive =
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sevenz_rust::SevenZReader::open(file_path, sevenz_rust::Password::empty()).unwrap();
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+1
-1
@@ -159,7 +159,7 @@ pub fn af_rtc_write_block(device: &mut device::Device, block: usize, offset: usi
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match device.pif.ram[block] {
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0 => {
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device.cart.rtc.control =
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(device.pif.ram[offset + 1] as u16) << 8 | device.pif.ram[offset] as u16;
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((device.pif.ram[offset + 1] as u16) << 8) | device.pif.ram[offset] as u16;
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device.pif.ram[status] = 0x00;
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}
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1 => {
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@@ -75,7 +75,7 @@ pub fn pak_read_block(
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channel: usize,
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) {
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let address =
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(device.pif.ram[addr_acrc] as u16) << 8 | (device.pif.ram[addr_acrc + 1] & 0xe0) as u16;
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((device.pif.ram[addr_acrc] as u16) << 8) | (device.pif.ram[addr_acrc + 1] & 0xe0) as u16;
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let handler = device.pif.channels[channel].pak_handler;
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if handler.is_some() {
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@@ -94,7 +94,7 @@ pub fn pak_write_block(
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channel: usize,
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) {
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let address =
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(device.pif.ram[addr_acrc] as u16) << 8 | (device.pif.ram[addr_acrc + 1] & 0xe0) as u16;
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((device.pif.ram[addr_acrc] as u16) << 8) | (device.pif.ram[addr_acrc + 1] & 0xe0) as u16;
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let handler = device.pif.channels[channel].pak_handler;
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if handler.is_some() {
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+1
-2
@@ -359,8 +359,7 @@ pub fn set_control_registers_fpu(device: &mut device::Device, index: u32, data:
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device.cpu.cop1.fcr31 = data & FCR31_WRITE_MASK;
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// the Cause bits are ANDed with the Enable bits to check for exceptions
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// "Unimplemented Operation" has no Enable bit and always causes an exception
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if (device.cpu.cop1.fcr31 & FCR31_CAUSE_MASK) >> 5
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& (device.cpu.cop1.fcr31 & FCR31_ENABLE_MASK)
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if ((device.cpu.cop1.fcr31 & FCR31_CAUSE_MASK) >> 5) & (device.cpu.cop1.fcr31 & FCR31_ENABLE_MASK)
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!= 0
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|| device.cpu.cop1.fcr31 & FCR31_CAUSE_UNIMP_BIT != 0
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{
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@@ -345,13 +345,12 @@ pub fn lwl(device: &mut device::Device, opcode: u32) {
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phys_address &= !3;
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device.cpu.gpr[rt(opcode) as usize] = se32(
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((device.cpu.gpr[rt(opcode) as usize] as u32) & mask
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| device::memory::data_read(
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((device.cpu.gpr[rt(opcode) as usize] as u32) & mask | (device::memory::data_read(
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device,
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phys_address,
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device::memory::AccessSize::Word,
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cached,
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) << shift) as i32,
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) << shift)) as i32,
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)
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}
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@@ -430,13 +429,12 @@ pub fn lwr(device: &mut device::Device, opcode: u32) {
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phys_address &= !3;
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device.cpu.gpr[rt(opcode) as usize] = se32(
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((device.cpu.gpr[rt(opcode) as usize] as u32) & (mask as u32)
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| device::memory::data_read(
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((device.cpu.gpr[rt(opcode) as usize] as u32) & (mask as u32) | (device::memory::data_read(
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device,
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phys_address,
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device::memory::AccessSize::Word,
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cached,
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) >> shift) as i32,
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) >> shift)) as i32,
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)
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}
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@@ -208,7 +208,7 @@ pub fn lw(device: &mut device::Device, opcode: u32) {
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w[3] = device.rsp.mem[(address as usize + 3) & 0xFFF];
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device.rsp.cpu.gpr[rt(opcode) as usize] =
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(w[0] as u32) << 24 | (w[1] as u32) << 16 | (w[2] as u32) << 8 | (w[3] as u32)
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((w[0] as u32) << 24) | ((w[1] as u32) << 16) | ((w[2] as u32) << 8) | (w[3] as u32)
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}
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pub fn lbu(device: &mut device::Device, opcode: u32) {
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@@ -240,7 +240,7 @@ pub fn lwu(device: &mut device::Device, opcode: u32) {
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w[3] = device.rsp.mem[(address as usize + 3) & 0xFFF];
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device.rsp.cpu.gpr[rt(opcode) as usize] =
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(w[0] as u32) << 24 | (w[1] as u32) << 16 | (w[2] as u32) << 8 | (w[3] as u32)
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((w[0] as u32) << 24) | ((w[1] as u32) << 16) | ((w[2] as u32) << 8) | (w[3] as u32)
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}
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pub fn sb(device: &mut device::Device, opcode: u32) {
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@@ -486,7 +486,7 @@ pub fn mfc2(device: &mut device::Device, opcode: u32) {
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device.rsp.cpu.vpr[rd(opcode) as usize],
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velement(opcode) + 1,
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);
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device.rsp.cpu.gpr[rt(opcode) as usize] = ((hi as u16) << 8 | (lo as u16)) as i16 as i32 as u32
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device.rsp.cpu.gpr[rt(opcode) as usize] = (((hi as u16) << 8) | (lo as u16)) as i16 as i32 as u32
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}
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pub fn cfc2(device: &mut device::Device, opcode: u32) {
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@@ -936,8 +936,7 @@ pub fn shv(device: &mut device::Device, opcode: u32) {
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let mut offset = 0;
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while offset < 8 {
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let byte_val = element + offset * 2;
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let value = get_vpr_byte(device.rsp.cpu.vpr[rt(opcode) as usize], byte_val) << 1
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| get_vpr_byte(device.rsp.cpu.vpr[rt(opcode) as usize], byte_val + 1) >> 7;
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let value = (get_vpr_byte(device.rsp.cpu.vpr[rt(opcode) as usize], byte_val) << 1) | (get_vpr_byte(device.rsp.cpu.vpr[rt(opcode) as usize], byte_val + 1) >> 7);
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device.rsp.mem[((address + ((index + offset * 2) & 15) as u32) & 0xFFF) as usize] = value;
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offset += 1;
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}
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@@ -478,7 +478,7 @@ pub fn vmacq(device: &mut device::Device, opcode: u32) {
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let mut n = 0;
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while n < 8 {
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let mut product =
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(get_vpr_element(*acch, n) as i32) << 16 | (get_vpr_element(*accm, n) as i32);
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((get_vpr_element(*acch, n) as i32) << 16) | (get_vpr_element(*accm, n) as i32);
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if product < 0 && (product & (1 << 5)) == 0 {
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product += 32
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} else if product >= 32 && (product & (1 << 5)) == 0 {
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@@ -1275,8 +1275,7 @@ pub fn vrcpl(device: &mut device::Device, opcode: u32) {
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let mut result;
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let vte = vte(device, vt(opcode), ve(opcode) as usize);
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let input = if device.rsp.cpu.divdp {
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(device.rsp.cpu.divin as i32) << 16
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| get_vpr_element(device.rsp.cpu.vpr[vt(opcode) as usize], ve(opcode) as u8) as u16
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((device.rsp.cpu.divin as i32) << 16) | get_vpr_element(device.rsp.cpu.vpr[vt(opcode) as usize], ve(opcode) as u8) as u16
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as i32
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} else {
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get_vpr_element(device.rsp.cpu.vpr[vt(opcode) as usize], ve(opcode) as u8) as i16 as i32
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@@ -1371,8 +1370,7 @@ pub fn vrsql(device: &mut device::Device, opcode: u32) {
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let mut result;
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let vte = vte(device, vt(opcode), ve(opcode) as usize);
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let input = if device.rsp.cpu.divdp {
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(device.rsp.cpu.divin as i32) << 16
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| get_vpr_element(device.rsp.cpu.vpr[vt(opcode) as usize], ve(opcode) as u8) as u16
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((device.rsp.cpu.divin as i32) << 16) | get_vpr_element(device.rsp.cpu.vpr[vt(opcode) as usize], ve(opcode) as u8) as u16
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as i32
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} else {
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get_vpr_element(device.rsp.cpu.vpr[vt(opcode) as usize], ve(opcode) as u8) as i16 as i32
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+1
-2
@@ -38,8 +38,7 @@ pub fn read(device: &mut device::Device, index: u64) {
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device.cpu.cop0.tlb_entries[index as usize].mask << 13;
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device.cpu.cop0.regs[device::cop0::COP0_ENTRYHI_REG as usize] =
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(device.cpu.cop0.tlb_entries[index as usize].region as u64) << 62
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| device.cpu.cop0.tlb_entries[index as usize].vpn2 << 13
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((device.cpu.cop0.tlb_entries[index as usize].region as u64) << 62) | (device.cpu.cop0.tlb_entries[index as usize].vpn2 << 13)
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| (device.cpu.cop0.tlb_entries[index as usize].asid) as u64;
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device.cpu.cop0.regs[device::cop0::COP0_ENTRYLO0_REG as usize] =
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+2
-4
@@ -23,12 +23,10 @@ pub fn play_audio(device: &mut device::Device, dram_addr: usize, length: u64) {
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let mut i = 0;
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while i < length as usize / 2 {
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// Left channel
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primary_buffer[i] = device.rdram.mem[dram_addr + (i * 2) + 2] as i16
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| (device.rdram.mem[dram_addr + (i * 2) + 3] as i16) << 8;
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primary_buffer[i] = device.rdram.mem[dram_addr + (i * 2) + 2] as i16 | ((device.rdram.mem[dram_addr + (i * 2) + 3] as i16) << 8);
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// Right channel
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primary_buffer[i + 1] = device.rdram.mem[dram_addr + (i * 2)] as i16
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| (device.rdram.mem[dram_addr + (i * 2) + 1] as i16) << 8;
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primary_buffer[i + 1] = device.rdram.mem[dram_addr + (i * 2)] as i16 | ((device.rdram.mem[dram_addr + (i * 2) + 1] as i16) << 8);
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i += 2;
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}
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