//
// Generated by Microsoft (R) HLSL Shader Compiler 10.1
//
//
// Buffer Definitions: 
//
// cbuffer XeResolveConstants
// {
//
//   uint xe_resolve_edram_info;        // Offset:    0 Size:     4
//   uint xe_resolve_address_info;      // Offset:    4 Size:     4
//   uint xe_resolve_dest_info;         // Offset:    8 Size:     4
//   uint xe_resolve_dest_pitch;        // Offset:   12 Size:     4
//   uint xe_resolve_dest_base;         // Offset:   16 Size:     4
//
// }
//
//
// Resource Bindings:
//
// Name                                 Type  Format         Dim      ID      HLSL Bind  Count
// ------------------------------ ---------- ------- ----------- ------- -------------- ------
// xe_resolve_source                 texture    byte         r/o      T0             t0      1 
// xe_resolve_dest                       UAV   uint2         buf      U0             u0      1 
// XeResolveConstants                cbuffer      NA          NA     CB0            cb0      1 
//
//
//
// Input signature:
//
// Name                 Index   Mask Register SysValue  Format   Used
// -------------------- ----- ------ -------- -------- ------- ------
// no Input
//
// Output signature:
//
// Name                 Index   Mask Register SysValue  Format   Used
// -------------------- ----- ------ -------- -------- ------- ------
// no Output
cs_5_1
dcl_globalFlags refactoringAllowed
dcl_constantbuffer CB0[0:0][2], immediateIndexed, space=0
dcl_resource_raw T0[0:0], space=0
dcl_uav_typed_buffer (uint,uint,uint,uint) U0[0:0], space=0
dcl_input vThreadID.xy
dcl_temps 16
dcl_thread_group 8, 8, 1
ubfe r0.x, l(11), l(7), CB0[0][0].y
uge r0.x, vThreadID.x, r0.x
if_nz r0.x
  ret 
endif 
ishl r0.xw, vThreadID.xxxx, l(3, 0, 0, 3)
ushr r1.xy, CB0[0][0].yyyy, l(5, 29, 0, 0)
mov r1.z, CB0[0][0].y
bfi r2.xy, l(5, 2, 0, 0), l(3, 3, 0, 0), r1.zxzz, l(0, 0, 0, 0)
mov r0.yz, vThreadID.yyyy
iadd r2.xy, r0.wzww, r2.xyxx
and r3.xyzw, CB0[0][0].xzwz, l(1023, 0x01000000, 0x00003fff, 8)
ubfe r4.xyzw, l(12, 2, 1, 4), l(13, 10, 29, 25), CB0[0][0].xxxx
uge r1.w, l(3), r1.y
if_nz r1.w
  mov r5.y, r1.y
else 
  ieq r1.w, r1.y, l(5)
  if_nz r1.w
    mov r5.y, l(2)
  else 
    mov r5.y, l(0)
  endif 
endif 
uge r2.zw, r4.yyyy, l(0, 0, 2, 1)
and r2.zw, r2.zzzw, l(0, 0, 1, 1)
ishl r2.xy, r2.xyxx, r2.zwzz
ushr r5.x, r5.y, l(1)
and r5.xy, r5.xyxx, l(1, 1, 0, 0)
iadd r2.xy, r2.xyxx, r5.xyxx
udiv r1.w, null, r2.x, l(80)
ushr r2.w, r2.y, l(4)
movc r4.y, r4.z, l(1), l(0)
ishl r5.x, r1.w, r4.y
imad r5.x, r2.w, r3.x, r5.x
iadd r4.x, r4.x, r5.x
ineg r5.x, r1.w
ineg r5.y, r2.w
imad r2.xy, r5.xyxx, l(80, 16, 0, 0), r2.xyxx
imad r1.w, r2.y, l(80), r2.x
ishl r1.w, r1.w, r4.y
imad r1.w, r4.x, l(1280), r1.w
iadd r2.x, r2.z, r4.z
ishl r2.y, l(4), r2.x
ishl r1.w, r1.w, l(2)
if_nz r4.z
  ieq r2.z, r2.y, l(8)
  if_nz r2.z
    ld_raw r5.xyzw, r1.w, T0[0].ywxz
    iadd r2.z, r1.w, l(16)
    ld_raw r6.xyzw, r2.z, T0[0].xyzw
    iadd r2.zw, r1.wwww, l(0, 0, 32, 48)
    ld_raw r7.xyzw, r2.z, T0[0].ywxz
    ld_raw r8.xyzw, r2.w, T0[0].xyzw
    mov r11.xy, r5.zwzz
    mov r11.zw, r6.xxxz
    mov r5.zw, r6.yyyw
    mov r6.xy, r7.zwzz
    mov r6.zw, r8.xxxz
    mov r7.zw, r8.yyyw
  else 
    ld_raw r5.xz, r1.w, T0[0].yxxx
    iadd r2.z, r2.y, r1.w
    ld_raw r5.yw, r2.z, T0[0].xyxx
    ishl r9.xyzw, l(8, 12, 16, 20), r2.xxxx
    iadd r9.xyzw, r1.wwww, r9.xyzw
    ld_raw r10.xy, r9.x, T0[0].xyxx
    ld_raw r10.zw, r9.y, T0[0].xxxy
    ld_raw r7.xz, r9.z, T0[0].yxxx
    ld_raw r7.yw, r9.w, T0[0].xyxx
    ishl r2.zw, l(0, 0, 24, 28), r2.xxxx
    iadd r2.zw, r1.wwww, r2.zzzw
    ld_raw r9.xy, r2.z, T0[0].xyxx
    ld_raw r9.zw, r2.w, T0[0].xxxy
    mov r11.xy, r5.zwzz
    mov r11.zw, r10.xxxz
    mov r5.zw, r10.yyyw
    mov r6.xy, r7.zwzz
    mov r6.zw, r9.xxxz
    mov r7.zw, r9.yyyw
  endif 
  switch r4.w
    case l(5)
    movc r8.xyzw, r3.yyyy, r5.xyzw, r11.xyzw
    ibfe r8.xyzw, l(16, 16, 16, 16), l(0, 0, 0, 0), r8.xyzw
    itof r8.xyzw, r8.xyzw
    mul r8.xyzw, r8.xyzw, l(0.000977, 0.000977, 0.000977, 0.000977)
    max r11.xyzw, r8.xyzw, l(-1.000000, -1.000000, -1.000000, -1.000000)
    movc r8.xyzw, r3.yyyy, r7.xyzw, r6.xyzw
    ibfe r8.xyzw, l(16, 16, 16, 16), l(0, 0, 0, 0), r8.xyzw
    itof r8.xyzw, r8.xyzw
    mul r8.xyzw, r8.xyzw, l(0.000977, 0.000977, 0.000977, 0.000977)
    max r6.xyzw, r8.xyzw, l(-1.000000, -1.000000, -1.000000, -1.000000)
    break 
    case l(7)
    movc r5.xyzw, r3.yyyy, r5.xyzw, r11.xyzw
    f16tof32 r11.xyzw, r5.xyzw
    movc r5.xyzw, r3.yyyy, r7.xyzw, r6.xyzw
    f16tof32 r6.xyzw, r5.xyzw
    break 
    default 
    break 
  endswitch 
else 
  ieq r2.z, r2.y, l(4)
  if_nz r2.z
    ld_raw r11.xyzw, r1.w, T0[0].xyzw
    iadd r2.z, r1.w, l(16)
    ld_raw r6.xyzw, r2.z, T0[0].xyzw
  else 
    ld_raw r11.x, r1.w, T0[0].xxxx
    iadd r2.z, r2.y, r1.w
    ld_raw r11.y, r2.z, T0[0].xxxx
    ishl r5.xyzw, l(8, 12, 16, 20), r2.xxxx
    iadd r5.xyzw, r1.wwww, r5.xyzw
    ld_raw r11.z, r5.x, T0[0].xxxx
    ld_raw r11.w, r5.y, T0[0].xxxx
    ld_raw r6.x, r5.z, T0[0].xxxx
    ld_raw r6.y, r5.w, T0[0].xxxx
    ishl r2.zw, l(0, 0, 24, 28), r2.xxxx
    iadd r2.zw, r1.wwww, r2.zzzw
    ld_raw r6.z, r2.z, T0[0].xxxx
    ld_raw r6.w, r2.w, T0[0].xxxx
  endif 
  switch r4.w
    case l(0)
    case l(1)
    movc r2.z, r3.y, l(16), l(0)
    ushr r5.xyzw, r11.xyzw, r2.zzzz
    and r5.xyzw, r5.xyzw, l(255, 255, 255, 255)
    utof r5.xyzw, r5.xyzw
    mul r11.xyzw, r5.xyzw, l(0.003922, 0.003922, 0.003922, 0.003922)
    ushr r5.xyzw, r6.xyzw, r2.zzzz
    and r5.xyzw, r5.xyzw, l(255, 255, 255, 255)
    utof r5.xyzw, r5.xyzw
    mul r6.xyzw, r5.xyzw, l(0.003922, 0.003922, 0.003922, 0.003922)
    break 
    case l(2)
    case l(10)
    movc r2.z, r3.y, l(20), l(0)
    ushr r5.xyzw, r11.xyzw, r2.zzzz
    and r5.xyzw, r5.xyzw, l(1023, 1023, 1023, 1023)
    utof r5.xyzw, r5.xyzw
    mul r11.xyzw, r5.xyzw, l(0.000978, 0.000978, 0.000978, 0.000978)
    ushr r5.xyzw, r6.xyzw, r2.zzzz
    and r5.xyzw, r5.xyzw, l(1023, 1023, 1023, 1023)
    utof r5.xyzw, r5.xyzw
    mul r6.xyzw, r5.xyzw, l(0.000978, 0.000978, 0.000978, 0.000978)
    break 
    case l(3)
    case l(12)
    movc r2.z, r3.y, l(20), l(0)
    ushr r5.xyzw, r11.xyzw, r2.zzzz
    and r7.xyzw, r5.xyzw, l(1023, 1023, 1023, 1023)
    and r8.xyzw, r5.xyzw, l(127, 127, 127, 127)
    ubfe r9.xyzw, l(3, 3, 3, 3), l(7, 7, 7, 7), r5.xyzw
    firstbit_hi r10.xyzw, r8.xyzw
    iadd r10.xyzw, r10.xyzw, l(-24, -24, -24, -24)
    movc r10.xyzw, r8.xyzw, r10.xyzw, l(8,8,8,8)
    iadd r12.xyzw, -r10.xyzw, l(1, 1, 1, 1)
    movc r12.xyzw, r9.xyzw, r9.xyzw, r12.xyzw
    bfi r5.xyzw, l(7, 7, 7, 7), r10.xyzw, r5.xyzw, l(0, 0, 0, 0)
    and r5.xyzw, r5.xyzw, l(127, 127, 127, 127)
    movc r5.xyzw, r9.xyzw, r8.xyzw, r5.xyzw
    ishl r8.xyzw, r12.xyzw, l(23, 23, 23, 23)
    iadd r8.xyzw, r8.xyzw, l(0x3e000000, 0x3e000000, 0x3e000000, 0x3e000000)
    ishl r5.xyzw, r5.xyzw, l(16, 16, 16, 16)
    iadd r5.xyzw, r8.xyzw, r5.xyzw
    movc r11.xyzw, r7.xyzw, r5.xyzw, l(0,0,0,0)
    ushr r5.xyzw, r6.xyzw, r2.zzzz
    and r7.xyzw, r5.xyzw, l(1023, 1023, 1023, 1023)
    and r8.xyzw, r5.xyzw, l(127, 127, 127, 127)
    ubfe r9.xyzw, l(3, 3, 3, 3), l(7, 7, 7, 7), r5.xyzw
    firstbit_hi r10.xyzw, r8.xyzw
    iadd r10.xyzw, r10.xyzw, l(-24, -24, -24, -24)
    movc r10.xyzw, r8.xyzw, r10.xyzw, l(8,8,8,8)
    iadd r12.xyzw, -r10.xyzw, l(1, 1, 1, 1)
    movc r12.xyzw, r9.xyzw, r9.xyzw, r12.xyzw
    bfi r5.xyzw, l(7, 7, 7, 7), r10.xyzw, r5.xyzw, l(0, 0, 0, 0)
    and r5.xyzw, r5.xyzw, l(127, 127, 127, 127)
    movc r5.xyzw, r9.xyzw, r8.xyzw, r5.xyzw
    ishl r8.xyzw, r12.xyzw, l(23, 23, 23, 23)
    iadd r8.xyzw, r8.xyzw, l(0x3e000000, 0x3e000000, 0x3e000000, 0x3e000000)
    ishl r5.xyzw, r5.xyzw, l(16, 16, 16, 16)
    iadd r5.xyzw, r8.xyzw, r5.xyzw
    movc r6.xyzw, r7.xyzw, r5.xyzw, l(0,0,0,0)
    break 
    case l(4)
    ibfe r5.xyzw, l(16, 16, 16, 16), l(0, 0, 0, 0), r11.xyzw
    itof r5.xyzw, r5.xyzw
    mul r5.xyzw, r5.xyzw, l(0.000977, 0.000977, 0.000977, 0.000977)
    max r11.xyzw, r5.xyzw, l(-1.000000, -1.000000, -1.000000, -1.000000)
    ibfe r5.xyzw, l(16, 16, 16, 16), l(0, 0, 0, 0), r6.xyzw
    itof r5.xyzw, r5.xyzw
    mul r5.xyzw, r5.xyzw, l(0.000977, 0.000977, 0.000977, 0.000977)
    max r6.xyzw, r5.xyzw, l(-1.000000, -1.000000, -1.000000, -1.000000)
    break 
    case l(6)
    f16tof32 r11.xyzw, r11.xyzw
    f16tof32 r6.xyzw, r6.xyzw
    break 
    default 
    break 
  endswitch 
endif 
ibfe r2.z, l(6), l(16), CB0[0][0].z
ishl r2.z, r2.z, l(23)
iadd r2.z, r2.z, l(0x3f800000)
uge r2.w, r1.y, l(4)
if_nz r2.w
  mul r2.w, r2.z, l(0.500000)
  ishl r4.x, l(320), r4.z
  iadd r4.x, r1.w, r4.x
  if_nz r4.z
    ieq r4.y, r2.y, l(8)
    if_nz r4.y
      ld_raw r5.xyzw, r4.x, T0[0].ywxz
      iadd r4.y, r4.x, l(16)
      ld_raw r7.xyzw, r4.y, T0[0].xyzw
      iadd r8.xy, r4.xxxx, l(32, 48, 0, 0)
      ld_raw r9.xyzw, r8.x, T0[0].ywxz
      ld_raw r8.xyzw, r8.y, T0[0].xyzw
      mov r10.xy, r5.zwzz
      mov r10.zw, r7.xxxz
      mov r5.zw, r7.yyyw
      mov r7.xy, r9.zwzz
      mov r7.zw, r8.xxxz
      mov r9.zw, r8.yyyw
    else 
      ld_raw r5.xz, r4.x, T0[0].yxxx
      iadd r4.y, r2.y, r4.x
      ld_raw r5.yw, r4.y, T0[0].xyxx
      ishl r10.xyzw, l(8, 12, 16, 20), r2.xxxx
      iadd r10.xyzw, r4.xxxx, r10.xyzw
      ld_raw r12.xy, r10.x, T0[0].xyxx
      ld_raw r12.zw, r10.y, T0[0].xxxy
      ld_raw r9.xz, r10.z, T0[0].yxxx
      ld_raw r9.yw, r10.w, T0[0].xyxx
      ishl r10.xy, l(24, 28, 0, 0), r2.xxxx
      iadd r10.xy, r4.xxxx, r10.xyxx
      ld_raw r13.xy, r10.x, T0[0].xyxx
      ld_raw r13.zw, r10.y, T0[0].xxxy
      mov r10.xy, r5.zwzz
      mov r10.zw, r12.xxxz
      mov r5.zw, r12.yyyw
      mov r7.xy, r9.zwzz
      mov r7.zw, r13.xxxz
      mov r9.zw, r13.yyyw
    endif 
    switch r4.w
      case l(5)
      movc r8.xyzw, r3.yyyy, r5.xyzw, r10.xyzw
      ibfe r8.xyzw, l(16, 16, 16, 16), l(0, 0, 0, 0), r8.xyzw
      itof r8.xyzw, r8.xyzw
      mul r8.xyzw, r8.xyzw, l(0.000977, 0.000977, 0.000977, 0.000977)
      max r10.xyzw, r8.xyzw, l(-1.000000, -1.000000, -1.000000, -1.000000)
      movc r8.xyzw, r3.yyyy, r9.xyzw, r7.xyzw
      ibfe r8.xyzw, l(16, 16, 16, 16), l(0, 0, 0, 0), r8.xyzw
      itof r8.xyzw, r8.xyzw
      mul r8.xyzw, r8.xyzw, l(0.000977, 0.000977, 0.000977, 0.000977)
      max r7.xyzw, r8.xyzw, l(-1.000000, -1.000000, -1.000000, -1.000000)
      break 
      case l(7)
      movc r5.xyzw, r3.yyyy, r5.xyzw, r10.xyzw
      f16tof32 r10.xyzw, r5.xyzw
      movc r5.xyzw, r3.yyyy, r9.xyzw, r7.xyzw
      f16tof32 r7.xyzw, r5.xyzw
      break 
      default 
      break 
    endswitch 
  else 
    ieq r4.y, r2.y, l(4)
    if_nz r4.y
      ld_raw r10.xyzw, r4.x, T0[0].xyzw
      iadd r4.y, r4.x, l(16)
      ld_raw r7.xyzw, r4.y, T0[0].xyzw
    else 
      ld_raw r10.x, r4.x, T0[0].xxxx
      iadd r4.y, r2.y, r4.x
      ld_raw r10.y, r4.y, T0[0].xxxx
      ishl r5.xyzw, l(8, 12, 16, 20), r2.xxxx
      iadd r5.xyzw, r4.xxxx, r5.xyzw
      ld_raw r10.z, r5.x, T0[0].xxxx
      ld_raw r10.w, r5.y, T0[0].xxxx
      ld_raw r7.x, r5.z, T0[0].xxxx
      ld_raw r7.y, r5.w, T0[0].xxxx
      ishl r5.xy, l(24, 28, 0, 0), r2.xxxx
      iadd r4.xy, r4.xxxx, r5.xyxx
      ld_raw r7.z, r4.x, T0[0].xxxx
      ld_raw r7.w, r4.y, T0[0].xxxx
    endif 
    switch r4.w
      case l(0)
      case l(1)
      movc r4.x, r3.y, l(16), l(0)
      ushr r5.xyzw, r10.xyzw, r4.xxxx
      and r5.xyzw, r5.xyzw, l(255, 255, 255, 255)
      utof r5.xyzw, r5.xyzw
      mul r10.xyzw, r5.xyzw, l(0.003922, 0.003922, 0.003922, 0.003922)
      ushr r5.xyzw, r7.xyzw, r4.xxxx
      and r5.xyzw, r5.xyzw, l(255, 255, 255, 255)
      utof r5.xyzw, r5.xyzw
      mul r7.xyzw, r5.xyzw, l(0.003922, 0.003922, 0.003922, 0.003922)
      break 
      case l(2)
      case l(10)
      movc r4.x, r3.y, l(20), l(0)
      ushr r5.xyzw, r10.xyzw, r4.xxxx
      and r5.xyzw, r5.xyzw, l(1023, 1023, 1023, 1023)
      utof r5.xyzw, r5.xyzw
      mul r10.xyzw, r5.xyzw, l(0.000978, 0.000978, 0.000978, 0.000978)
      ushr r5.xyzw, r7.xyzw, r4.xxxx
      and r5.xyzw, r5.xyzw, l(1023, 1023, 1023, 1023)
      utof r5.xyzw, r5.xyzw
      mul r7.xyzw, r5.xyzw, l(0.000978, 0.000978, 0.000978, 0.000978)
      break 
      case l(3)
      case l(12)
      movc r4.x, r3.y, l(20), l(0)
      ushr r5.xyzw, r10.xyzw, r4.xxxx
      and r8.xyzw, r5.xyzw, l(1023, 1023, 1023, 1023)
      and r9.xyzw, r5.xyzw, l(127, 127, 127, 127)
      ubfe r12.xyzw, l(3, 3, 3, 3), l(7, 7, 7, 7), r5.xyzw
      firstbit_hi r13.xyzw, r9.xyzw
      iadd r13.xyzw, r13.xyzw, l(-24, -24, -24, -24)
      movc r13.xyzw, r9.xyzw, r13.xyzw, l(8,8,8,8)
      iadd r14.xyzw, -r13.xyzw, l(1, 1, 1, 1)
      movc r14.xyzw, r12.xyzw, r12.xyzw, r14.xyzw
      bfi r5.xyzw, l(7, 7, 7, 7), r13.xyzw, r5.xyzw, l(0, 0, 0, 0)
      and r5.xyzw, r5.xyzw, l(127, 127, 127, 127)
      movc r5.xyzw, r12.xyzw, r9.xyzw, r5.xyzw
      ishl r9.xyzw, r14.xyzw, l(23, 23, 23, 23)
      iadd r9.xyzw, r9.xyzw, l(0x3e000000, 0x3e000000, 0x3e000000, 0x3e000000)
      ishl r5.xyzw, r5.xyzw, l(16, 16, 16, 16)
      iadd r5.xyzw, r9.xyzw, r5.xyzw
      movc r10.xyzw, r8.xyzw, r5.xyzw, l(0,0,0,0)
      ushr r5.xyzw, r7.xyzw, r4.xxxx
      and r8.xyzw, r5.xyzw, l(1023, 1023, 1023, 1023)
      and r9.xyzw, r5.xyzw, l(127, 127, 127, 127)
      ubfe r12.xyzw, l(3, 3, 3, 3), l(7, 7, 7, 7), r5.xyzw
      firstbit_hi r13.xyzw, r9.xyzw
      iadd r13.xyzw, r13.xyzw, l(-24, -24, -24, -24)
      movc r13.xyzw, r9.xyzw, r13.xyzw, l(8,8,8,8)
      iadd r14.xyzw, -r13.xyzw, l(1, 1, 1, 1)
      movc r14.xyzw, r12.xyzw, r12.xyzw, r14.xyzw
      bfi r5.xyzw, l(7, 7, 7, 7), r13.xyzw, r5.xyzw, l(0, 0, 0, 0)
      and r5.xyzw, r5.xyzw, l(127, 127, 127, 127)
      movc r5.xyzw, r12.xyzw, r9.xyzw, r5.xyzw
      ishl r9.xyzw, r14.xyzw, l(23, 23, 23, 23)
      iadd r9.xyzw, r9.xyzw, l(0x3e000000, 0x3e000000, 0x3e000000, 0x3e000000)
      ishl r5.xyzw, r5.xyzw, l(16, 16, 16, 16)
      iadd r5.xyzw, r9.xyzw, r5.xyzw
      movc r7.xyzw, r8.xyzw, r5.xyzw, l(0,0,0,0)
      break 
      case l(4)
      ibfe r5.xyzw, l(16, 16, 16, 16), l(0, 0, 0, 0), r10.xyzw
      itof r5.xyzw, r5.xyzw
      mul r5.xyzw, r5.xyzw, l(0.000977, 0.000977, 0.000977, 0.000977)
      max r10.xyzw, r5.xyzw, l(-1.000000, -1.000000, -1.000000, -1.000000)
      ibfe r5.xyzw, l(16, 16, 16, 16), l(0, 0, 0, 0), r7.xyzw
      itof r5.xyzw, r5.xyzw
      mul r5.xyzw, r5.xyzw, l(0.000977, 0.000977, 0.000977, 0.000977)
      max r7.xyzw, r5.xyzw, l(-1.000000, -1.000000, -1.000000, -1.000000)
      break 
      case l(6)
      f16tof32 r10.xyzw, r10.xyzw
      f16tof32 r7.xyzw, r7.xyzw
      break 
      default 
      break 
    endswitch 
  endif 
  add r11.xyzw, r10.xyzw, r11.xyzw
  add r6.xyzw, r6.xyzw, r7.xyzw
  uge r1.y, r1.y, l(6)
  if_nz r1.y
    mul r2.z, r2.z, l(0.250000)
    ishl r4.xy, l(4, 324, 0, 0), r4.zzzz
    iadd r1.yw, r1.wwww, r4.xxxy
    if_nz r4.z
      ieq r4.x, r2.y, l(8)
      if_nz r4.x
        ld_raw r5.xyzw, r1.y, T0[0].ywxz
        iadd r7.xyz, r1.yyyy, l(16, 32, 48, 0)
        ld_raw r8.xyzw, r7.x, T0[0].xyzw
        ld_raw r9.xyzw, r7.y, T0[0].ywxz
        ld_raw r7.xyzw, r7.z, T0[0].xyzw
        mov r13.xy, r5.zwzz
        mov r13.zw, r8.xxxz
        mov r5.zw, r8.yyyw
        mov r8.xy, r9.zwzz
        mov r8.zw, r7.xxxz
        mov r9.zw, r7.yyyw
      else 
        ld_raw r5.xz, r1.y, T0[0].yxxx
        iadd r4.x, r2.y, r1.y
        ld_raw r5.yw, r4.x, T0[0].xyxx
        ishl r10.xyzw, l(8, 12, 16, 20), r2.xxxx
        iadd r10.xyzw, r1.yyyy, r10.xyzw
        ld_raw r12.xy, r10.x, T0[0].xyxx
        ld_raw r12.zw, r10.y, T0[0].xxxy
        ld_raw r9.xz, r10.z, T0[0].yxxx
        ld_raw r9.yw, r10.w, T0[0].xyxx
        ishl r4.xy, l(24, 28, 0, 0), r2.xxxx
        iadd r4.xy, r1.yyyy, r4.xyxx
        ld_raw r10.xy, r4.x, T0[0].xyxx
        ld_raw r10.zw, r4.y, T0[0].xxxy
        mov r13.xy, r5.zwzz
        mov r13.zw, r12.xxxz
        mov r5.zw, r12.yyyw
        mov r8.xy, r9.zwzz
        mov r8.zw, r10.xxxz
        mov r9.zw, r10.yyyw
      endif 
      switch r4.w
        case l(5)
        movc r7.xyzw, r3.yyyy, r5.xyzw, r13.xyzw
        ibfe r7.xyzw, l(16, 16, 16, 16), l(0, 0, 0, 0), r7.xyzw
        itof r7.xyzw, r7.xyzw
        mul r7.xyzw, r7.xyzw, l(0.000977, 0.000977, 0.000977, 0.000977)
        max r13.xyzw, r7.xyzw, l(-1.000000, -1.000000, -1.000000, -1.000000)
        movc r7.xyzw, r3.yyyy, r9.xyzw, r8.xyzw
        ibfe r7.xyzw, l(16, 16, 16, 16), l(0, 0, 0, 0), r7.xyzw
        itof r7.xyzw, r7.xyzw
        mul r7.xyzw, r7.xyzw, l(0.000977, 0.000977, 0.000977, 0.000977)
        max r8.xyzw, r7.xyzw, l(-1.000000, -1.000000, -1.000000, -1.000000)
        break 
        case l(7)
        movc r5.xyzw, r3.yyyy, r5.xyzw, r13.xyzw
        f16tof32 r13.xyzw, r5.xyzw
        movc r5.xyzw, r3.yyyy, r9.xyzw, r8.xyzw
        f16tof32 r8.xyzw, r5.xyzw
        break 
        default 
        break 
      endswitch 
    else 
      ieq r4.x, r2.y, l(4)
      if_nz r4.x
        ld_raw r13.xyzw, r1.y, T0[0].xyzw
        iadd r4.x, r1.y, l(16)
        ld_raw r8.xyzw, r4.x, T0[0].xyzw
      else 
        ld_raw r13.x, r1.y, T0[0].xxxx
        iadd r4.x, r2.y, r1.y
        ld_raw r13.y, r4.x, T0[0].xxxx
        ishl r5.xyzw, l(8, 12, 16, 20), r2.xxxx
        iadd r5.xyzw, r1.yyyy, r5.xyzw
        ld_raw r13.z, r5.x, T0[0].xxxx
        ld_raw r13.w, r5.y, T0[0].xxxx
        ld_raw r8.x, r5.z, T0[0].xxxx
        ld_raw r8.y, r5.w, T0[0].xxxx
        ishl r4.xy, l(24, 28, 0, 0), r2.xxxx
        iadd r4.xy, r1.yyyy, r4.xyxx
        ld_raw r8.z, r4.x, T0[0].xxxx
        ld_raw r8.w, r4.y, T0[0].xxxx
      endif 
      switch r4.w
        case l(0)
        case l(1)
        movc r1.y, r3.y, l(16), l(0)
        ushr r5.xyzw, r13.xyzw, r1.yyyy
        and r5.xyzw, r5.xyzw, l(255, 255, 255, 255)
        utof r5.xyzw, r5.xyzw
        mul r13.xyzw, r5.xyzw, l(0.003922, 0.003922, 0.003922, 0.003922)
        ushr r5.xyzw, r8.xyzw, r1.yyyy
        and r5.xyzw, r5.xyzw, l(255, 255, 255, 255)
        utof r5.xyzw, r5.xyzw
        mul r8.xyzw, r5.xyzw, l(0.003922, 0.003922, 0.003922, 0.003922)
        break 
        case l(2)
        case l(10)
        movc r1.y, r3.y, l(20), l(0)
        ushr r5.xyzw, r13.xyzw, r1.yyyy
        and r5.xyzw, r5.xyzw, l(1023, 1023, 1023, 1023)
        utof r5.xyzw, r5.xyzw
        mul r13.xyzw, r5.xyzw, l(0.000978, 0.000978, 0.000978, 0.000978)
        ushr r5.xyzw, r8.xyzw, r1.yyyy
        and r5.xyzw, r5.xyzw, l(1023, 1023, 1023, 1023)
        utof r5.xyzw, r5.xyzw
        mul r8.xyzw, r5.xyzw, l(0.000978, 0.000978, 0.000978, 0.000978)
        break 
        case l(3)
        case l(12)
        movc r1.y, r3.y, l(20), l(0)
        ushr r5.xyzw, r13.xyzw, r1.yyyy
        and r7.xyzw, r5.xyzw, l(1023, 1023, 1023, 1023)
        and r9.xyzw, r5.xyzw, l(127, 127, 127, 127)
        ubfe r10.xyzw, l(3, 3, 3, 3), l(7, 7, 7, 7), r5.xyzw
        firstbit_hi r12.xyzw, r9.xyzw
        iadd r12.xyzw, r12.xyzw, l(-24, -24, -24, -24)
        movc r12.xyzw, r9.xyzw, r12.xyzw, l(8,8,8,8)
        iadd r14.xyzw, -r12.xyzw, l(1, 1, 1, 1)
        movc r14.xyzw, r10.xyzw, r10.xyzw, r14.xyzw
        bfi r5.xyzw, l(7, 7, 7, 7), r12.xyzw, r5.xyzw, l(0, 0, 0, 0)
        and r5.xyzw, r5.xyzw, l(127, 127, 127, 127)
        movc r5.xyzw, r10.xyzw, r9.xyzw, r5.xyzw
        ishl r9.xyzw, r14.xyzw, l(23, 23, 23, 23)
        iadd r9.xyzw, r9.xyzw, l(0x3e000000, 0x3e000000, 0x3e000000, 0x3e000000)
        ishl r5.xyzw, r5.xyzw, l(16, 16, 16, 16)
        iadd r5.xyzw, r9.xyzw, r5.xyzw
        movc r13.xyzw, r7.xyzw, r5.xyzw, l(0,0,0,0)
        ushr r5.xyzw, r8.xyzw, r1.yyyy
        and r7.xyzw, r5.xyzw, l(1023, 1023, 1023, 1023)
        and r9.xyzw, r5.xyzw, l(127, 127, 127, 127)
        ubfe r10.xyzw, l(3, 3, 3, 3), l(7, 7, 7, 7), r5.xyzw
        firstbit_hi r12.xyzw, r9.xyzw
        iadd r12.xyzw, r12.xyzw, l(-24, -24, -24, -24)
        movc r12.xyzw, r9.xyzw, r12.xyzw, l(8,8,8,8)
        iadd r14.xyzw, -r12.xyzw, l(1, 1, 1, 1)
        movc r14.xyzw, r10.xyzw, r10.xyzw, r14.xyzw
        bfi r5.xyzw, l(7, 7, 7, 7), r12.xyzw, r5.xyzw, l(0, 0, 0, 0)
        and r5.xyzw, r5.xyzw, l(127, 127, 127, 127)
        movc r5.xyzw, r10.xyzw, r9.xyzw, r5.xyzw
        ishl r9.xyzw, r14.xyzw, l(23, 23, 23, 23)
        iadd r9.xyzw, r9.xyzw, l(0x3e000000, 0x3e000000, 0x3e000000, 0x3e000000)
        ishl r5.xyzw, r5.xyzw, l(16, 16, 16, 16)
        iadd r5.xyzw, r9.xyzw, r5.xyzw
        movc r8.xyzw, r7.xyzw, r5.xyzw, l(0,0,0,0)
        break 
        case l(4)
        ibfe r5.xyzw, l(16, 16, 16, 16), l(0, 0, 0, 0), r13.xyzw
        itof r5.xyzw, r5.xyzw
        mul r5.xyzw, r5.xyzw, l(0.000977, 0.000977, 0.000977, 0.000977)
        max r13.xyzw, r5.xyzw, l(-1.000000, -1.000000, -1.000000, -1.000000)
        ibfe r5.xyzw, l(16, 16, 16, 16), l(0, 0, 0, 0), r8.xyzw
        itof r5.xyzw, r5.xyzw
        mul r5.xyzw, r5.xyzw, l(0.000977, 0.000977, 0.000977, 0.000977)
        max r8.xyzw, r5.xyzw, l(-1.000000, -1.000000, -1.000000, -1.000000)
        break 
        case l(6)
        f16tof32 r13.xyzw, r13.xyzw
        f16tof32 r8.xyzw, r8.xyzw
        break 
        default 
        break 
      endswitch 
    endif 
    add r5.xyzw, r11.xyzw, r13.xyzw
    add r7.xyzw, r6.xyzw, r8.xyzw
    if_nz r4.z
      ieq r1.y, r2.y, l(8)
      if_nz r1.y
        ld_raw r8.xyzw, r1.w, T0[0].ywxz
        iadd r4.xyz, r1.wwww, l(16, 32, 48, 0)
        ld_raw r9.xyzw, r4.x, T0[0].xyzw
        ld_raw r10.xyzw, r4.y, T0[0].ywxz
        ld_raw r12.xyzw, r4.z, T0[0].xyzw
        mov r15.xy, r8.zwzz
        mov r15.zw, r9.xxxz
        mov r8.zw, r9.yyyw
        mov r9.xy, r10.zwzz
        mov r9.zw, r12.xxxz
        mov r10.zw, r12.yyyw
      else 
        ld_raw r8.xz, r1.w, T0[0].yxxx
        iadd r1.y, r2.y, r1.w
        ld_raw r8.yw, r1.y, T0[0].xyxx
        ishl r13.xyzw, l(8, 12, 16, 20), r2.xxxx
        iadd r13.xyzw, r1.wwww, r13.xyzw
        ld_raw r14.xy, r13.x, T0[0].xyxx
        ld_raw r14.zw, r13.y, T0[0].xxxy
        ld_raw r10.xz, r13.z, T0[0].yxxx
        ld_raw r10.yw, r13.w, T0[0].xyxx
        ishl r4.xy, l(24, 28, 0, 0), r2.xxxx
        iadd r4.xy, r1.wwww, r4.xyxx
        ld_raw r13.xy, r4.x, T0[0].xyxx
        ld_raw r13.zw, r4.y, T0[0].xxxy
        mov r15.xy, r8.zwzz
        mov r15.zw, r14.xxxz
        mov r8.zw, r14.yyyw
        mov r9.xy, r10.zwzz
        mov r9.zw, r13.xxxz
        mov r10.zw, r13.yyyw
      endif 
      switch r4.w
        case l(5)
        movc r12.xyzw, r3.yyyy, r8.xyzw, r15.xyzw
        ibfe r12.xyzw, l(16, 16, 16, 16), l(0, 0, 0, 0), r12.xyzw
        itof r12.xyzw, r12.xyzw
        mul r12.xyzw, r12.xyzw, l(0.000977, 0.000977, 0.000977, 0.000977)
        max r15.xyzw, r12.xyzw, l(-1.000000, -1.000000, -1.000000, -1.000000)
        movc r12.xyzw, r3.yyyy, r10.xyzw, r9.xyzw
        ibfe r12.xyzw, l(16, 16, 16, 16), l(0, 0, 0, 0), r12.xyzw
        itof r12.xyzw, r12.xyzw
        mul r12.xyzw, r12.xyzw, l(0.000977, 0.000977, 0.000977, 0.000977)
        max r9.xyzw, r12.xyzw, l(-1.000000, -1.000000, -1.000000, -1.000000)
        break 
        case l(7)
        movc r8.xyzw, r3.yyyy, r8.xyzw, r15.xyzw
        f16tof32 r15.xyzw, r8.xyzw
        movc r8.xyzw, r3.yyyy, r10.xyzw, r9.xyzw
        f16tof32 r9.xyzw, r8.xyzw
        break 
        default 
        break 
      endswitch 
    else 
      ieq r1.y, r2.y, l(4)
      if_nz r1.y
        ld_raw r15.xyzw, r1.w, T0[0].xyzw
        iadd r1.y, r1.w, l(16)
        ld_raw r9.xyzw, r1.y, T0[0].xyzw
      else 
        ld_raw r15.x, r1.w, T0[0].xxxx
        iadd r1.y, r2.y, r1.w
        ld_raw r15.y, r1.y, T0[0].xxxx
        ishl r8.xyzw, l(8, 12, 16, 20), r2.xxxx
        iadd r8.xyzw, r1.wwww, r8.xyzw
        ld_raw r15.z, r8.x, T0[0].xxxx
        ld_raw r15.w, r8.y, T0[0].xxxx
        ld_raw r9.x, r8.z, T0[0].xxxx
        ld_raw r9.y, r8.w, T0[0].xxxx
        ishl r2.xy, l(24, 28, 0, 0), r2.xxxx
        iadd r1.yw, r1.wwww, r2.xxxy
        ld_raw r9.z, r1.y, T0[0].xxxx
        ld_raw r9.w, r1.w, T0[0].xxxx
      endif 
      switch r4.w
        case l(0)
        case l(1)
        movc r1.y, r3.y, l(16), l(0)
        ushr r4.xyzw, r15.xyzw, r1.yyyy
        and r4.xyzw, r4.xyzw, l(255, 255, 255, 255)
        utof r4.xyzw, r4.xyzw
        mul r15.xyzw, r4.xyzw, l(0.003922, 0.003922, 0.003922, 0.003922)
        ushr r4.xyzw, r9.xyzw, r1.yyyy
        and r4.xyzw, r4.xyzw, l(255, 255, 255, 255)
        utof r4.xyzw, r4.xyzw
        mul r9.xyzw, r4.xyzw, l(0.003922, 0.003922, 0.003922, 0.003922)
        break 
        case l(2)
        case l(10)
        movc r1.y, r3.y, l(20), l(0)
        ushr r4.xyzw, r15.xyzw, r1.yyyy
        and r4.xyzw, r4.xyzw, l(1023, 1023, 1023, 1023)
        utof r4.xyzw, r4.xyzw
        mul r15.xyzw, r4.xyzw, l(0.000978, 0.000978, 0.000978, 0.000978)
        ushr r4.xyzw, r9.xyzw, r1.yyyy
        and r4.xyzw, r4.xyzw, l(1023, 1023, 1023, 1023)
        utof r4.xyzw, r4.xyzw
        mul r9.xyzw, r4.xyzw, l(0.000978, 0.000978, 0.000978, 0.000978)
        break 
        case l(3)
        case l(12)
        movc r1.y, r3.y, l(20), l(0)
        ushr r4.xyzw, r15.xyzw, r1.yyyy
        and r8.xyzw, r4.xyzw, l(1023, 1023, 1023, 1023)
        and r10.xyzw, r4.xyzw, l(127, 127, 127, 127)
        ubfe r12.xyzw, l(3, 3, 3, 3), l(7, 7, 7, 7), r4.xyzw
        firstbit_hi r13.xyzw, r10.xyzw
        iadd r13.xyzw, r13.xyzw, l(-24, -24, -24, -24)
        movc r13.xyzw, r10.xyzw, r13.xyzw, l(8,8,8,8)
        iadd r14.xyzw, -r13.xyzw, l(1, 1, 1, 1)
        movc r14.xyzw, r12.xyzw, r12.xyzw, r14.xyzw
        bfi r4.xyzw, l(7, 7, 7, 7), r13.xyzw, r4.xyzw, l(0, 0, 0, 0)
        and r4.xyzw, r4.xyzw, l(127, 127, 127, 127)
        movc r4.xyzw, r12.xyzw, r10.xyzw, r4.xyzw
        ishl r10.xyzw, r14.xyzw, l(23, 23, 23, 23)
        iadd r10.xyzw, r10.xyzw, l(0x3e000000, 0x3e000000, 0x3e000000, 0x3e000000)
        ishl r4.xyzw, r4.xyzw, l(16, 16, 16, 16)
        iadd r4.xyzw, r10.xyzw, r4.xyzw
        movc r15.xyzw, r8.xyzw, r4.xyzw, l(0,0,0,0)
        ushr r4.xyzw, r9.xyzw, r1.yyyy
        and r8.xyzw, r4.xyzw, l(1023, 1023, 1023, 1023)
        and r10.xyzw, r4.xyzw, l(127, 127, 127, 127)
        ubfe r12.xyzw, l(3, 3, 3, 3), l(7, 7, 7, 7), r4.xyzw
        firstbit_hi r13.xyzw, r10.xyzw
        iadd r13.xyzw, r13.xyzw, l(-24, -24, -24, -24)
        movc r13.xyzw, r10.xyzw, r13.xyzw, l(8,8,8,8)
        iadd r14.xyzw, -r13.xyzw, l(1, 1, 1, 1)
        movc r14.xyzw, r12.xyzw, r12.xyzw, r14.xyzw
        bfi r4.xyzw, l(7, 7, 7, 7), r13.xyzw, r4.xyzw, l(0, 0, 0, 0)
        and r4.xyzw, r4.xyzw, l(127, 127, 127, 127)
        movc r4.xyzw, r12.xyzw, r10.xyzw, r4.xyzw
        ishl r10.xyzw, r14.xyzw, l(23, 23, 23, 23)
        iadd r10.xyzw, r10.xyzw, l(0x3e000000, 0x3e000000, 0x3e000000, 0x3e000000)
        ishl r4.xyzw, r4.xyzw, l(16, 16, 16, 16)
        iadd r4.xyzw, r10.xyzw, r4.xyzw
        movc r9.xyzw, r8.xyzw, r4.xyzw, l(0,0,0,0)
        break 
        case l(4)
        ibfe r4.xyzw, l(16, 16, 16, 16), l(0, 0, 0, 0), r15.xyzw
        itof r4.xyzw, r4.xyzw
        mul r4.xyzw, r4.xyzw, l(0.000977, 0.000977, 0.000977, 0.000977)
        max r15.xyzw, r4.xyzw, l(-1.000000, -1.000000, -1.000000, -1.000000)
        ibfe r4.xyzw, l(16, 16, 16, 16), l(0, 0, 0, 0), r9.xyzw
        itof r4.xyzw, r4.xyzw
        mul r4.xyzw, r4.xyzw, l(0.000977, 0.000977, 0.000977, 0.000977)
        max r9.xyzw, r4.xyzw, l(-1.000000, -1.000000, -1.000000, -1.000000)
        break 
        case l(6)
        f16tof32 r15.xyzw, r15.xyzw
        f16tof32 r9.xyzw, r9.xyzw
        break 
        default 
        break 
      endswitch 
    endif 
    add r11.xyzw, r5.xyzw, r15.xyzw
    add r6.xyzw, r7.xyzw, r9.xyzw
  else 
    mov r2.z, r2.w
  endif 
endif 
mul_sat r4.xyzw, r2.zzzz, r11.xyzw
mul_sat r2.xyzw, r2.zzzz, r6.xyzw
bfi r1.xyzw, l(2, 2, 2, 2), l(3, 3, 3, 3), r1.zxxz, l(0, 0, 0, 0)
iadd r0.xyzw, r0.xyzw, r1.xyzw
if_nz r3.w
  ubfe r3.xy, l(3, 14, 0, 0), l(4, 16, 0, 0), CB0[0][0].zwzz
  iadd r1.xy, r3.yzyy, l(31, 31, 0, 0)
  ishr r5.xyzw, r0.zwzw, l(4, 5, 3, 3)
  ishr r1.z, r3.x, l(2)
  ushr r1.xy, r1.xyxx, l(4, 5, 0, 0)
  and r1.x, r1.x, l(2046)
  imad r1.x, r1.z, r1.x, r5.x
  imad r1.x, r1.x, r1.y, r5.y
  ishl r1.y, r0.z, l(8)
  ishr r1.y, r1.y, l(6)
  iadd r1.z, r1.z, r5.z
  bfi r1.w, l(1), l(1), r1.z, l(0)
  iadd r1.w, r1.w, r5.w
  bfi r1.w, l(2), l(1), r1.w, l(0)
  bfi r1.z, l(1), l(0), r1.z, r1.w
  and r1.yw, r1.yyyy, l(0, 16, 0, 8)
  bfi r3.yw, l(0, 22, 0, 22), l(0, 8, 0, 11), r1.xxxx, l(0, 0, 0, 0)
  imad r1.xy, r1.yyyy, l(2, 16, 0, 0), r3.ywyy
  bfi r1.xy, l(5, 5, 0, 0), l(0, 3, 0, 0), r1.wwww, r1.xyxx
  bfi r1.xy, l(2, 2, 0, 0), l(6, 9, 0, 0), r3.xxxx, r1.xyxx
  ubfe r1.w, l(3), l(6), r1.x
  and r3.x, r1.z, l(6)
  bfi r1.z, l(1), l(8), r1.z, l(0)
  imad r1.z, r1.w, l(32), r1.z
  imad r1.z, r3.x, l(4), r1.z
  bfi r1.xy, l(1, 1, 0, 0), l(4, 7, 0, 0), r0.zzzz, r1.xyxx
  bfi r1.y, l(9), l(3), r1.z, r1.y
  bfi r1.x, l(6), l(0), r1.x, r1.y
else 
  ishr r5.xyzw, r0.xyzw, l(5, 5, 2, 3)
  iadd r0.x, r3.z, l(31)
  ushr r0.x, r0.x, l(5)
  imad r0.x, r5.y, r0.x, r5.x
  ishl r0.yw, r0.zzzz, l(0, 2, 0, 7)
  ishl r1.y, r0.y, l(1)
  and r1.y, r1.y, l(96)
  bfi r1.z, l(25), l(7), r0.x, r1.y
  and r0.yw, r0.yyyw, l(0, 8, 0, 2048)
  iadd r1.z, r1.z, r0.y
  bfi r1.z, l(1), l(4), r0.z, r1.z
  ishl r1.yw, r1.yyyy, l(0, 3, 0, 2)
  bfi r1.yw, l(0, 25, 0, 25), l(0, 10, 0, 9), r0.xxxx, r1.yyyw
  imad r0.xy, r0.yyyy, l(8, 4, 0, 0), r1.ywyy
  bfi r0.xy, l(1, 1, 0, 0), l(7, 6, 0, 0), r0.zzzz, r0.xyxx
  bfi r0.x, l(12), l(0), r0.w, r0.x
  and r0.y, r0.y, l(1792)
  iadd r0.x, r0.x, r0.y
  and r0.y, r5.z, l(2)
  iadd r0.y, r5.w, r0.y
  bfi r0.y, l(2), l(6), r0.y, l(0)
  iadd r0.x, r0.x, r0.y
  bfi r1.x, l(6), l(0), r1.z, r0.x
endif 
iadd r0.x, r1.x, CB0[0][1].x
ushr r0.x, r0.x, l(3)
mad r1.xyzw, r4.xyzw, l(255.000000, 255.000000, 255.000000, 255.000000), l(0.500000, 0.500000, 0.500000, 0.500000)
ftou r1.xyzw, r1.xyzw
imad r0.y, r1.y, l(256), r1.x
imad r0.y, r1.z, l(0x00010000), r0.y
imad r1.xzw, r1.wwww, l(0x01000000, 0, 0x01000000, 0x01000000), r0.yyyy
mad r2.xyzw, r2.xyzw, l(255.000000, 255.000000, 255.000000, 255.000000), l(0.500000, 0.500000, 0.500000, 0.500000)
ftou r2.xyzw, r2.xyzw
imad r0.y, r2.y, l(256), r2.x
imad r0.y, r2.z, l(0x00010000), r0.y
imad r1.y, r2.w, l(0x01000000), r0.y
store_uav_typed U0[0].xyzw, r0.xxxx, r1.xyzw
ret 
// Approximately 778 instruction slots used
