//
// Generated by Microsoft (R) HLSL Shader Compiler 10.1
//
//
// Buffer Definitions: 
//
// cbuffer XeTextureLoadConstants
// {
//
//   uint xe_texture_load_guest_base;   // Offset:    0 Size:     4
//   uint xe_texture_load_guest_pitch;  // Offset:    4 Size:     4
//   uint xe_texture_load_host_base;    // Offset:    8 Size:     4
//   uint xe_texture_load_host_pitch;   // Offset:   12 Size:     4
//   uint3 xe_texture_load_size_texels; // Offset:   16 Size:    12
//   bool xe_texture_load_is_3d;        // Offset:   28 Size:     4
//   uint3 xe_texture_load_size_blocks; // Offset:   32 Size:    12
//   uint xe_texture_load_endianness;   // Offset:   44 Size:     4
//   uint2 xe_texture_guest_storage_width_height;// Offset:   48 Size:     8
//   uint xe_texture_load_guest_format; // Offset:   56 Size:     4 [unused]
//   uint3 xe_texture_load_guest_mip_offset;// Offset:   64 Size:    12
//
// }
//
//
// Resource Bindings:
//
// Name                                 Type  Format         Dim      ID      HLSL Bind  Count
// ------------------------------ ---------- ------- ----------- ------- -------------- ------
// xe_texture_load_source            texture    byte         r/o      T0             t0      1 
// xe_texture_load_dest                  UAV    byte         r/w      U0             u0      1 
// XeTextureLoadConstants            cbuffer      NA          NA     CB0            cb0      1 
//
//
//
// Input signature:
//
// Name                 Index   Mask Register SysValue  Format   Used
// -------------------- ----- ------ -------- -------- ------- ------
// no Input
//
// Output signature:
//
// Name                 Index   Mask Register SysValue  Format   Used
// -------------------- ----- ------ -------- -------- ------- ------
// no Output
cs_5_1
dcl_globalFlags refactoringAllowed
dcl_constantbuffer CB0[0:0][5], immediateIndexed, space=0
dcl_resource_raw T0[0:0], space=0
dcl_uav_raw U0[0:0], space=0
dcl_input vThreadID.xyz
dcl_temps 15
dcl_thread_group 8, 32, 1
ishl r0.x, vThreadID.x, l(2)
mov r0.yz, vThreadID.yyzy
uge r1.xyz, r0.xyzx, CB0[0][2].xyzx
or r0.w, r1.y, r1.x
or r0.w, r1.z, r0.w
if_nz r0.w
  ret 
endif 
iadd r1.xyz, r0.xyzx, CB0[0][4].xyzx
ieq r0.z, CB0[0][0].y, l(-1)
if_nz r0.z
  if_nz CB0[0][1].w
    iadd r0.zw, CB0[0][3].yyyx, l(0, 0, 31, 31)
    iadd r2.xyzw, r1.xxxx, l(0, 1, 2, 3)
    ushr r3.xyz, r1.yzyy, l(4, 2, 3, 0)
    ushr r0.zw, r0.zzzw, l(0, 0, 4, 5)
    and r0.z, r0.z, l(0x0ffffffe)
    imad r0.z, r3.y, r0.z, r3.x
    ushr r4.xyzw, r2.xyzw, l(5, 5, 5, 5)
    imad r4.xyzw, r0.zzzz, r0.wwww, r4.xyzw
    ishl r0.z, r1.y, l(12)
    and r0.z, r0.z, l(0x00006000)
    bfi r5.xyzw, l(3, 3, 3, 3), l(10, 10, 10, 10), r2.xyzw, r0.zzzz
    ushr r5.xyzw, r5.xyzw, l(6, 6, 6, 6)
    iadd r0.z, r3.y, r3.z
    ushr r2.xyzw, r2.xyzw, l(3, 3, 3, 3)
    bfi r0.w, l(1), l(1), r0.z, l(0)
    iadd r2.xyzw, r0.wwww, r2.xyzw
    bfi r2.xyzw, l(2, 2, 2, 2), l(1, 1, 1, 1), r2.xyzw, l(0, 0, 0, 0)
    bfi r2.xyzw, l(1, 1, 1, 1), l(0, 0, 0, 0), r0.zzzz, r2.xyzw
    bfi r3.xyzw, l(18, 18, 18, 18), l(12, 12, 12, 12), r4.xyzw, l(0, 0, 0, 0)
    imad r3.xyzw, r5.xyzw, l(2, 2, 2, 2), r3.xyzw
    bfi r3.xyzw, l(2, 2, 2, 2), l(10, 10, 10, 10), r1.zzzz, r3.xyzw
    bfi r0.z, l(1), l(4), r1.y, l(0)
    iadd r6.xyzw, r3.xyzw, r0.zzzz
    ubfe r3.xyzw, l(3, 3, 3, 3), l(6, 6, 6, 6), r3.xyzw
    and r7.xyzw, r2.xyzw, l(6, 6, 6, 6)
    bfi r2.xyzw, l(1, 1, 1, 1), l(8, 8, 8, 8), r2.xyzw, l(0, 0, 0, 0)
    imad r2.xyzw, r3.xyzw, l(32, 32, 32, 32), r2.xyzw
    imad r2.xyzw, r7.xyzw, l(4, 4, 4, 4), r2.xyzw
    bfi r3.xyzw, l(18, 18, 18, 18), l(15, 15, 15, 15), r4.xyzw, l(0, 0, 0, 0)
    imad r3.xyzw, r5.xyzw, l(16, 16, 16, 16), r3.xyzw
    bfi r3.xyzw, l(2, 2, 2, 2), l(13, 13, 13, 13), r1.zzzz, r3.xyzw
    imad r3.xyzw, r0.zzzz, l(8, 8, 8, 8), r3.xyzw
    bfi r2.xyzw, l(9, 9, 9, 9), l(3, 3, 3, 3), r2.xyzw, r3.xyzw
    bfi r2.xyzw, l(6, 6, 6, 6), l(0, 0, 0, 0), r6.xyzw, r2.xyzw
  else 
    iadd r3.xyzw, r1.xxxx, l(0, 1, 2, 3)
    ushr r4.xyzw, r3.xyzw, l(5, 5, 5, 5)
    ushr r0.zw, r1.yyyy, l(0, 0, 5, 2)
    iadd r1.w, CB0[0][3].x, l(31)
    ushr r1.w, r1.w, l(5)
    imad r4.xyzw, r0.zzzz, r1.wwww, r4.xyzw
    ishl r0.z, r1.y, l(7)
    and r5.xy, r0.zzzz, l(1792, 2048, 0, 0)
    bfi r6.xyzw, l(3, 3, 3, 3), l(5, 5, 5, 5), r3.xyzw, r5.xxxx
    bfi r6.xyzw, l(21, 21, 21, 21), l(11, 11, 11, 11), r4.xyzw, r6.xyzw
    bfi r0.z, l(1), l(4), r1.y, l(0)
    iadd r6.xyzw, r6.xyzw, r0.zzzz
    ishl r5.xz, r5.xxxx, l(3, 0, 2, 0)
    bfi r7.xyzw, l(3, 3, 3, 3), l(8, 8, 8, 8), r3.xyzw, r5.xxxx
    bfi r7.xyzw, l(21, 21, 21, 21), l(14, 14, 14, 14), r4.xyzw, r7.xyzw
    imad r7.xyzw, r0.zzzz, l(8, 8, 8, 8), r7.xyzw
    bfi r7.xyzw, l(12, 12, 12, 12), l(0, 0, 0, 0), r5.yyyy, r7.xyzw
    bfi r5.xyzw, l(3, 3, 3, 3), l(7, 7, 7, 7), r3.xyzw, r5.zzzz
    bfi r4.xyzw, l(21, 21, 21, 21), l(13, 13, 13, 13), r4.xyzw, r5.xyzw
    imad r4.xyzw, r0.zzzz, l(4, 4, 4, 4), r4.xyzw
    and r4.xyzw, r4.xyzw, l(1792, 1792, 1792, 1792)
    iadd r4.xyzw, r7.xyzw, r4.xyzw
    ushr r3.xyzw, r3.xyzw, l(3, 3, 3, 3)
    and r0.z, r0.w, l(2)
    iadd r3.xyzw, r0.zzzz, r3.xyzw
    bfi r3.xyzw, l(2, 2, 2, 2), l(6, 6, 6, 6), r3.xyzw, l(0, 0, 0, 0)
    iadd r3.xyzw, r4.xyzw, r3.xyzw
    bfi r2.xyzw, l(6, 6, 6, 6), l(0, 0, 0, 0), r6.xyzw, r3.xyzw
  endif 
else 
  ishl r0.z, r1.x, l(4)
  iadd r0.w, CB0[0][2].y, l(31)
  and r0.w, r0.w, l(-32)
  imad r0.w, r1.z, r0.w, r1.y
  imad r0.z, r0.w, CB0[0][0].y, r0.z
  iadd r2.xyzw, r0.zzzz, l(0, 16, 32, 48)
endif 
iadd r1.xyzw, r2.xyzw, CB0[0][0].xxxx
ld_raw r2.xyzw, r1.x, T0[0].wxyz
ld_raw r3.xyzw, r1.y, T0[0].xyzw
ld_raw r4.xyzw, r1.z, T0[0].xyzw
ld_raw r1.xyzw, r1.w, T0[0].xyzw
ushr r0.z, CB0[0][2].w, l(1)
xor r0.z, r0.z, CB0[0][2].w
and r0.z, r0.z, l(1)
if_nz r0.z
  ishl r5.xyzw, r2.yzwx, l(8, 8, 8, 8)
  and r5.xyzw, r5.xyzw, l(0xff00ff00, 0xff00ff00, 0xff00ff00, 0xff00ff00)
  ushr r6.xyzw, r2.yzwx, l(8, 8, 8, 8)
  and r6.xyzw, r6.xyzw, l(0x00ff00ff, 0x00ff00ff, 0x00ff00ff, 0x00ff00ff)
  iadd r2.xyzw, r5.wxyz, r6.wxyz
endif 
and r0.w, CB0[0][2].w, l(2)
if_nz r0.w
  ushr r5.xyzw, r2.yzwx, l(16, 16, 16, 16)
  bfi r2.xyzw, l(16, 16, 16, 16), l(16, 16, 16, 16), r2.xyzw, r5.wxyz
  mov r5.x, r2.y
  mov r6.x, r2.z
  mov r7.x, r2.w
else 
  mov r5.x, r2.y
  mov r6.x, r2.z
  mov r7.x, r2.w
endif 
if_nz r0.z
  ishl r8.xyzw, r3.xyzw, l(8, 8, 8, 8)
  and r8.xyzw, r8.xyzw, l(0xff00ff00, 0xff00ff00, 0xff00ff00, 0xff00ff00)
  ushr r9.xyzw, r3.xyzw, l(8, 8, 8, 8)
  and r9.xyzw, r9.xyzw, l(0x00ff00ff, 0x00ff00ff, 0x00ff00ff, 0x00ff00ff)
  iadd r3.xyzw, r8.xyzw, r9.xyzw
endif 
if_nz r0.w
  ushr r8.xyzw, r3.xyzw, l(16, 16, 16, 16)
  bfi r8.xyzw, l(16, 16, 16, 16), l(16, 16, 16, 16), r3.xyzw, r8.xyzw
  mov r5.y, r8.x
  mov r6.y, r8.y
  mov r7.y, r8.z
  mov r2.y, r8.w
else 
  mov r5.y, r3.x
  mov r6.y, r3.y
  mov r7.y, r3.z
  mov r2.y, r3.w
endif 
if_nz r0.z
  ishl r3.xyzw, r4.xyzw, l(8, 8, 8, 8)
  and r3.xyzw, r3.xyzw, l(0xff00ff00, 0xff00ff00, 0xff00ff00, 0xff00ff00)
  ushr r8.xyzw, r4.xyzw, l(8, 8, 8, 8)
  and r8.xyzw, r8.xyzw, l(0x00ff00ff, 0x00ff00ff, 0x00ff00ff, 0x00ff00ff)
  iadd r4.xyzw, r3.xyzw, r8.xyzw
endif 
if_nz r0.w
  ushr r3.xyzw, r4.xyzw, l(16, 16, 16, 16)
  bfi r3.xyzw, l(16, 16, 16, 16), l(16, 16, 16, 16), r4.xyzw, r3.xyzw
  mov r5.z, r3.x
  mov r6.z, r3.y
  mov r7.z, r3.z
  mov r2.z, r3.w
else 
  mov r5.z, r4.x
  mov r6.z, r4.y
  mov r7.z, r4.z
  mov r2.z, r4.w
endif 
if_nz r0.z
  ishl r3.xyzw, r1.xyzw, l(8, 8, 8, 8)
  and r3.xyzw, r3.xyzw, l(0xff00ff00, 0xff00ff00, 0xff00ff00, 0xff00ff00)
  ushr r4.xyzw, r1.xyzw, l(8, 8, 8, 8)
  and r4.xyzw, r4.xyzw, l(0x00ff00ff, 0x00ff00ff, 0x00ff00ff, 0x00ff00ff)
  iadd r1.xyzw, r3.xyzw, r4.xyzw
endif 
if_nz r0.w
  ushr r3.xyzw, r1.xyzw, l(16, 16, 16, 16)
  bfi r3.xyzw, l(16, 16, 16, 16), l(16, 16, 16, 16), r1.xyzw, r3.xyzw
  mov r5.w, r3.x
  mov r6.w, r3.y
  mov r7.w, r3.z
  mov r2.w, r3.w
else 
  mov r5.w, r1.x
  mov r6.w, r1.y
  mov r7.w, r1.z
  mov r2.w, r1.w
endif 
ishl r1.xyzw, r2.xyzw, l(1, 1, 1, 1)
and r1.xyzw, r1.xyzw, l(0xaaaaaaaa, 0xaaaaaaaa, 0xaaaaaaaa, 0xaaaaaaaa)
ushr r2.xyzw, r2.xyzw, l(1, 1, 1, 1)
and r2.xyzw, r2.xyzw, l(0x55555555, 0x55555555, 0x55555555, 0x55555555)
iadd r1.xyzw, r1.xyzw, r2.xyzw
ushr r2.xyzw, r1.xyzw, l(1, 1, 1, 1)
and r2.xyzw, r2.xyzw, l(0x55555555, 0x55555555, 0x55555555, 0x55555555)
xor r1.xyzw, r1.xyzw, r2.xyzw
bfi r2.xyzw, l(5, 5, 5, 5), l(23, 23, 23, 23), r7.xyzw, l(0, 0, 0, 0)
ishl r3.xyzw, r7.xyzw, l(18, 18, 18, 18)
and r3.xyzw, r3.xyzw, l(0x00700000, 0x00700000, 0x00700000, 0x00700000)
iadd r2.xyzw, r2.xyzw, r3.xyzw
ishl r3.xyzw, r7.xyzw, l(7, 7, 7, 7)
and r4.xyzw, r3.xyzw, l(0x0003f000, 0x0003f000, 0x0003f000, 0x0003f000)
iadd r2.xyzw, r2.xyzw, r4.xyzw
ishl r4.xyzw, r7.xyzw, l(1, 1, 1, 1)
and r4.xyzw, r4.xyzw, l(3072, 3072, 3072, 3072)
iadd r2.xyzw, r2.xyzw, r4.xyzw
ushr r4.xyzw, r7.xyzw, l(8, 8, 8, 8)
and r4.xyzw, r4.xyzw, l(248, 248, 248, 248)
iadd r2.xyzw, r2.xyzw, r4.xyzw
ubfe r4.xyzw, l(3, 3, 3, 3), l(13, 13, 13, 13), r7.xyzw
iadd r2.xyzw, r2.xyzw, r4.xyzw
and r3.xyzw, r3.xyzw, l(0x0f800000, 0x0f800000, 0x0f800000, 0x0f800000)
ishl r4.xyzw, r7.xyzw, l(2, 2, 2, 2)
and r4.xyzw, r4.xyzw, l(0x00700000, 0x00700000, 0x00700000, 0x00700000)
iadd r3.xyzw, r3.xyzw, r4.xyzw
ushr r4.xyzw, r7.xyzw, l(9, 9, 9, 9)
and r4.xyzw, r4.xyzw, l(0x0003f000, 0x0003f000, 0x0003f000, 0x0003f000)
iadd r3.xyzw, r3.xyzw, r4.xyzw
ushr r4.xyzw, r7.xyzw, l(15, 15, 15, 15)
and r4.xyzw, r4.xyzw, l(3072, 3072, 3072, 3072)
iadd r3.xyzw, r3.xyzw, r4.xyzw
ushr r4.xyzw, r7.xyzw, l(24, 24, 24, 24)
and r4.xyzw, r4.xyzw, l(248, 248, 248, 248)
iadd r3.xyzw, r3.xyzw, r4.xyzw
ushr r4.xyzw, r7.xyzw, l(29, 29, 29, 29)
iadd r3.xyzw, r3.xyzw, r4.xyzw
ishl r0.xy, r0.xyxx, l(2, 2, 0, 0)
ishl r0.x, r0.x, l(2)
imad r0.z, vThreadID.z, CB0[0][1].y, r0.y
imad r0.x, r0.z, CB0[0][0].w, r0.x
iadd r0.x, r0.x, CB0[0][0].z
mov r0.z, CB0[0][1].y
mov r0.w, r0.y
mov r4.x, r0.x
mov r4.y, l(0)
loop 
  uge r4.z, r4.y, l(4)
  breakc_nz r4.z
  ishl r4.z, r4.y, l(3)
  ushr r7.xyzw, r1.wxyz, r4.zzzz
  not r8.xyzw, r7.xyzw
  ushr r9.yzw, r8.yyyy, l(0, 2, 4, 6)
  mov r9.x, r8.y
  and r9.xyzw, r9.xyzw, l(3, 3, 3, 3)
  ushr r10.yzw, r7.yyyy, l(0, 2, 4, 6)
  mov r10.x, r7.y
  and r10.xyzw, r10.xyzw, l(3, 3, 3, 3)
  imul null, r10.xyzw, r3.xxxx, r10.xyzw
  imad r9.xyzw, r9.xyzw, r2.xxxx, r10.xyzw
  and r10.xyzw, r9.xyzw, l(1023, 1023, 1023, 1023)
  udiv r10.xyzw, null, r10.xyzw, l(3, 3, 3, 3)
  ubfe r11.xyzw, l(10, 10, 10, 10), l(10, 10, 10, 10), r9.xyzw
  udiv r11.xyzw, null, r11.xyzw, l(3, 3, 3, 3)
  ishl r11.xyzw, r11.xyzw, l(8, 8, 8, 8)
  or r10.xyzw, r10.xyzw, r11.xyzw
  ushr r9.xyzw, r9.xyzw, l(20, 20, 20, 20)
  udiv r9.xyzw, null, r9.xyzw, l(3, 3, 3, 3)
  ishl r9.xyzw, r9.xyzw, l(16, 16, 16, 16)
  or r9.xyzw, r9.xyzw, r10.xyzw
  ushr r10.yzw, r8.zzzz, l(0, 2, 4, 6)
  mov r10.x, r8.z
  and r10.xyzw, r10.xyzw, l(3, 3, 3, 3)
  ushr r11.yzw, r7.zzzz, l(0, 2, 4, 6)
  mov r11.x, r7.z
  and r11.xyzw, r11.xyzw, l(3, 3, 3, 3)
  imul null, r11.xyzw, r3.yyyy, r11.xyzw
  imad r10.xyzw, r10.xyzw, r2.yyyy, r11.xyzw
  and r11.xyzw, r10.xyzw, l(1023, 1023, 1023, 1023)
  udiv r11.xyzw, null, r11.xyzw, l(3, 3, 3, 3)
  ubfe r12.xyzw, l(10, 10, 10, 10), l(10, 10, 10, 10), r10.xyzw
  udiv r12.xyzw, null, r12.xyzw, l(3, 3, 3, 3)
  ishl r12.xyzw, r12.xyzw, l(8, 8, 8, 8)
  or r11.xyzw, r11.xyzw, r12.xyzw
  ushr r10.xyzw, r10.xyzw, l(20, 20, 20, 20)
  udiv r10.xyzw, null, r10.xyzw, l(3, 3, 3, 3)
  ishl r10.xyzw, r10.xyzw, l(16, 16, 16, 16)
  or r10.xyzw, r10.xyzw, r11.xyzw
  ushr r11.yzw, r8.wwww, l(0, 2, 4, 6)
  mov r11.x, r8.w
  and r11.xyzw, r11.xyzw, l(3, 3, 3, 3)
  ushr r12.yzw, r7.wwww, l(0, 2, 4, 6)
  mov r12.x, r7.w
  and r12.xyzw, r12.xyzw, l(3, 3, 3, 3)
  imul null, r12.xyzw, r3.zzzz, r12.xyzw
  imad r11.xyzw, r11.xyzw, r2.zzzz, r12.xyzw
  and r12.xyzw, r11.xyzw, l(1023, 1023, 1023, 1023)
  udiv r12.xyzw, null, r12.xyzw, l(3, 3, 3, 3)
  ubfe r13.xyzw, l(10, 10, 10, 10), l(10, 10, 10, 10), r11.xyzw
  udiv r13.xyzw, null, r13.xyzw, l(3, 3, 3, 3)
  ishl r13.xyzw, r13.xyzw, l(8, 8, 8, 8)
  or r12.xyzw, r12.xyzw, r13.xyzw
  ushr r11.xyzw, r11.xyzw, l(20, 20, 20, 20)
  udiv r11.xyzw, null, r11.xyzw, l(3, 3, 3, 3)
  ishl r11.xyzw, r11.xyzw, l(16, 16, 16, 16)
  or r11.xyzw, r11.xyzw, r12.xyzw
  ushr r8.yzw, r8.xxxx, l(0, 2, 4, 6)
  and r8.xyzw, r8.xyzw, l(3, 3, 3, 3)
  ushr r7.yzw, r7.xxxx, l(0, 2, 4, 6)
  and r7.xyzw, r7.xyzw, l(3, 3, 3, 3)
  imul null, r7.xyzw, r3.wwww, r7.xyzw
  imad r7.xyzw, r8.xyzw, r2.wwww, r7.xyzw
  and r8.xyzw, r7.xyzw, l(1023, 1023, 1023, 1023)
  udiv r8.xyzw, null, r8.xyzw, l(3, 3, 3, 3)
  ubfe r12.xyzw, l(10, 10, 10, 10), l(10, 10, 10, 10), r7.xyzw
  udiv r12.xyzw, null, r12.xyzw, l(3, 3, 3, 3)
  ishl r12.xyzw, r12.xyzw, l(8, 8, 8, 8)
  or r8.xyzw, r8.xyzw, r12.xyzw
  ushr r7.xyzw, r7.xyzw, l(20, 20, 20, 20)
  udiv r7.xyzw, null, r7.xyzw, l(3, 3, 3, 3)
  ishl r7.xyzw, r7.xyzw, l(16, 16, 16, 16)
  or r7.xyzw, r7.xyzw, r8.xyzw
  ult r4.z, r4.y, l(2)
  movc r8.xyzw, r4.zzzz, r5.xyzw, r6.xyzw
  bfi r4.z, l(1), l(4), r4.y, l(0)
  ushr r8.xyzw, r8.xyzw, r4.zzzz
  bfi r12.xyzw, l(8, 8, 8, 8), l(4, 4, 4, 4), r8.xyzw, l(0, 0, 0, 0)
  bfi r12.xyzw, l(4, 4, 4, 4), l(0, 0, 0, 0), r8.xyzw, r12.xyzw
  ishl r13.xyzw, r8.xyzw, l(8, 8, 8, 8)
  and r13.xyzw, r13.xyzw, l(0x000ff000, 0x000ff000, 0x000ff000, 0x000ff000)
  iadd r12.xyzw, r12.xyzw, r13.xyzw
  ishl r13.xyzw, r8.xyzw, l(12, 12, 12, 12)
  and r13.xyzw, r13.xyzw, l(0x0ff00000, 0x0ff00000, 0x0ff00000, 0x0ff00000)
  iadd r14.xyzw, r12.xyzw, r13.xyzw
  ishl r8.xyzw, r8.xyzw, l(16, 16, 16, 16)
  bfi r8.xyzw, l(28, 28, 28, 28), l(0, 0, 0, 0), r14.xyzw, r8.xyzw
  ishl r14.xyz, r13.xxxx, l(24, 16, 8, 0)
  imad r14.xyz, r12.xxxx, l(0x01000000, 0x00010000, 256, 0), r14.xyzx
  mov r14.w, r8.x
  and r14.xyzw, r14.xyzw, l(0xff000000, 0xff000000, 0xff000000, 0xff000000)
  or r9.xyzw, r9.xyzw, r14.xyzw
  store_raw U0[0].xyzw, r4.x, r9.xyzw
  iadd r9.xyz, r4.xxxx, l(16, 32, 48, 0)
  ishl r14.xyz, r13.yyyy, l(24, 16, 8, 0)
  imad r14.xyz, r12.yyyy, l(0x01000000, 0x00010000, 256, 0), r14.xyzx
  mov r14.w, r8.y
  and r14.xyzw, r14.xyzw, l(0xff000000, 0xff000000, 0xff000000, 0xff000000)
  or r10.xyzw, r10.xyzw, r14.xyzw
  store_raw U0[0].xyzw, r9.x, r10.xyzw
  ishl r10.xyz, r13.zzzz, l(24, 16, 8, 0)
  imad r10.xyz, r12.zzzz, l(0x01000000, 0x00010000, 256, 0), r10.xyzx
  mov r10.w, r8.z
  and r10.xyzw, r10.xyzw, l(0xff000000, 0xff000000, 0xff000000, 0xff000000)
  or r10.xyzw, r10.xyzw, r11.xyzw
  store_raw U0[0].xyzw, r9.y, r10.xyzw
  ishl r9.xyw, r13.wwww, l(24, 16, 0, 8)
  imad r8.xyz, r12.wwww, l(0x01000000, 0x00010000, 256, 0), r9.xywx
  and r8.xyzw, r8.xyzw, l(0xff000000, 0xff000000, 0xff000000, 0xff000000)
  or r7.xyzw, r7.xyzw, r8.xyzw
  store_raw U0[0].xyzw, r9.z, r7.xyzw
  iadd r0.w, r0.w, l(1)
  uge r4.z, r0.w, r0.z
  if_nz r4.z
    ret 
  endif 
  iadd r4.x, r4.x, CB0[0][0].w
  iadd r4.y, r4.y, l(1)
endloop 
ret 
// Approximately 341 instruction slots used
