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ff633bc5d5
The tmp[lh] variables were defined as inputs to the asm rather than outputs, which meant that the compiler rightly diagnosed uninitialized inputs. Reported-by: Philippe Mathieu-Daudé <philmd@linaro.org> Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org> Tested-by: Philippe Mathieu-Daudé <philmd@linaro.org> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
103 lines
3.1 KiB
C++
103 lines
3.1 KiB
C++
/*
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* SPDX-License-Identifier: GPL-2.0-or-later
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* Compare-and-swap for 128-bit atomic operations, AArch64 version.
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*
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* Copyright (C) 2018, 2023 Linaro, Ltd.
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*
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* See docs/devel/atomics.rst for discussion about the guarantees each
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* atomic primitive is meant to provide.
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*/
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#ifndef AARCH64_ATOMIC128_CAS_H
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#define AARCH64_ATOMIC128_CAS_H
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/* Through gcc 10, aarch64 has no support for 128-bit atomics. */
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#if defined(CONFIG_ATOMIC128) || defined(CONFIG_CMPXCHG128)
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#include "host/include/generic/host/atomic128-cas.h.inc"
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#else
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static inline Int128 atomic16_cmpxchg(Int128 *ptr, Int128 cmp, Int128 new)
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{
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uint64_t cmpl = int128_getlo(cmp), cmph = int128_gethi(cmp);
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uint64_t newl = int128_getlo(new), newh = int128_gethi(new);
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uint64_t oldl, oldh;
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uint32_t tmp;
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asm("0: ldaxp %[oldl], %[oldh], %[mem]\n\t"
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"cmp %[oldl], %[cmpl]\n\t"
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"ccmp %[oldh], %[cmph], #0, eq\n\t"
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"b.ne 1f\n\t"
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"stlxp %w[tmp], %[newl], %[newh], %[mem]\n\t"
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"cbnz %w[tmp], 0b\n"
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"1:"
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: [mem] "+m"(*ptr), [tmp] "=&r"(tmp),
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[oldl] "=&r"(oldl), [oldh] "=&r"(oldh)
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: [cmpl] "r"(cmpl), [cmph] "r"(cmph),
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[newl] "r"(newl), [newh] "r"(newh)
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: "memory", "cc");
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return int128_make128(oldl, oldh);
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}
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static inline Int128 atomic16_xchg(Int128 *ptr, Int128 new)
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{
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uint64_t newl = int128_getlo(new), newh = int128_gethi(new);
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uint64_t oldl, oldh;
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uint32_t tmp;
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asm("0: ldaxp %[oldl], %[oldh], %[mem]\n\t"
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"stlxp %w[tmp], %[newl], %[newh], %[mem]\n\t"
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"cbnz %w[tmp], 0b"
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: [mem] "+m"(*ptr), [tmp] "=&r"(tmp),
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[oldl] "=&r"(oldl), [oldh] "=&r"(oldh)
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: [newl] "r"(newl), [newh] "r"(newh)
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: "memory");
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return int128_make128(oldl, oldh);
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}
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static inline Int128 atomic16_fetch_and(Int128 *ptr, Int128 new)
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{
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uint64_t newl = int128_getlo(new), newh = int128_gethi(new);
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uint64_t oldl, oldh, tmpl, tmph;
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uint32_t tmp;
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asm("0: ldaxp %[oldl], %[oldh], %[mem]\n\t"
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"and %[tmpl], %[oldl], %[newl]\n\t"
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"and %[tmph], %[oldh], %[newh]\n\t"
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"stlxp %w[tmp], %[tmpl], %[tmph], %[mem]\n\t"
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"cbnz %w[tmp], 0b"
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: [mem] "+m"(*ptr), [tmp] "=&r"(tmp),
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[oldl] "=&r"(oldl), [oldh] "=&r"(oldh),
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[tmpl] "=&r"(tmpl), [tmph] "=&r"(tmph)
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: [newl] "r"(newl), [newh] "r"(newh)
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: "memory");
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return int128_make128(oldl, oldh);
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}
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static inline Int128 atomic16_fetch_or(Int128 *ptr, Int128 new)
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{
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uint64_t newl = int128_getlo(new), newh = int128_gethi(new);
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uint64_t oldl, oldh, tmpl, tmph;
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uint32_t tmp;
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asm("0: ldaxp %[oldl], %[oldh], %[mem]\n\t"
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"orr %[tmpl], %[oldl], %[newl]\n\t"
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"orr %[tmph], %[oldh], %[newh]\n\t"
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"stlxp %w[tmp], %[tmpl], %[tmph], %[mem]\n\t"
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"cbnz %w[tmp], 0b"
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: [mem] "+m"(*ptr), [tmp] "=&r"(tmp),
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[oldl] "=&r"(oldl), [oldh] "=&r"(oldh),
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[tmpl] "=&r"(tmpl), [tmph] "=&r"(tmph)
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: [newl] "r"(newl), [newh] "r"(newh)
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: "memory");
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return int128_make128(oldl, oldh);
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}
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# define CONFIG_CMPXCHG128 1
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# define HAVE_CMPXCHG128 1
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#endif
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#endif /* AARCH64_ATOMIC128_CAS_H */
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