Edgar E. Iglesias 4ffb9ae2e1 cris: Mask interrupts on dslots for CRISv10. ...

CRISv10 cores (unlike v32) do not take any interrupts while delayed
jumps are pending (delay slots).

Signed-off-by: Edgar E. Iglesias <edgar.iglesias@gmail.com>

2010-02-20 19:17:29 +01:00

..

cpu.h

cris: Add support for CRISv10 translation.

2010-02-15 12:18:57 +01:00

crisv10-decode.h

cris: Add support for CRISv10 translation.

2010-02-15 12:18:57 +01:00

crisv32-decode.h

Update to a hopefully more future proof FSF address

2009-07-16 20:47:01 +00:00

exec.h

kill regs_to_env and env_to_regs

2010-01-19 16:31:02 -06:00

helper.c

cris: Add v10 style interrupts.

2010-02-15 11:47:34 +01:00

helper.h

…

machine.c

Convert machine registration to use module init functions

2009-05-21 08:47:55 -05:00

mmu.c

CRIS: Segmented addressing only for kernel mode.

2009-10-10 17:34:27 +02:00

mmu.h

CRIS: cris_mmu_result_t -> cris_mmu_result

2009-04-25 15:51:53 +02:00

op_helper.c

crisv10: Always clear the V and C flags on btst.

2010-02-15 11:20:30 +01:00

opcode-cris.h

Update to a hopefully more future proof FSF address

2009-07-16 20:47:01 +00:00

translate_v10.c

cris: Mask interrupts on dslots for CRISv10.

2010-02-20 19:17:29 +01:00

translate.c

cris: Add support for CRISv10 translation.

2010-02-15 12:18:57 +01:00