Luis Pires d39b2cc7d0 target/ppc: Implement DCFFIXQQ ...

Implement the following PowerISA v3.1 instruction:
dcffixqq: DFP Convert From Fixed Quadword Quad

Signed-off-by: Luis Pires <luis.pires@eldorado.org.br>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Message-Id: <20211029192417.400707-5-luis.pires@eldorado.org.br>
Signed-off-by: David Gibson <david@gibson.dropbear.id.au>

2021-11-09 10:32:52 +11:00

..

alpha

target/alpha: Implement alpha_cpu_record_sigbus

2021-11-02 07:00:52 -04:00

arm

Merge remote-tracking branch 'remotes/rth/tags/pull-arm-20211102-2' into staging

2021-11-03 09:31:25 -04:00

avr

target/avr: Drop checks for singlestep_enabled

2021-10-15 16:39:14 -07:00

cris

target/cris: Make cris_cpu_tlb_fill sysemu only

2021-11-02 07:00:52 -04:00

hexagon

Merge remote-tracking branch 'remotes/quic/tags/pull-hex-20211103' into staging

2021-11-04 06:34:36 -04:00

hppa

target/hppa: Make hppa_cpu_tlb_fill sysemu only

2021-11-02 07:00:52 -04:00

i386

target-i386: mmu: fix handling of noncanonical virtual addresses

2021-11-08 08:55:20 +01:00

m68k

target/m68k: Make m68k_cpu_tlb_fill sysemu only

2021-11-02 07:00:52 -04:00

microblaze

target/microblaze: Do not set MO_ALIGN for user-only

2021-11-02 07:00:52 -04:00

mips

Merge remote-tracking branch 'remotes/philmd/tags/mips-20211102' into staging

2021-11-02 15:12:11 -04:00

nios2

target/nios2: Implement nios2_cpu_record_sigsegv

2021-11-02 07:00:52 -04:00

openrisc

target/openrisc: Make openrisc_cpu_tlb_fill sysemu only

2021-11-02 07:00:52 -04:00

ppc

target/ppc: Implement DCFFIXQQ

2021-11-09 10:32:52 +11:00

riscv

target/riscv: Make riscv_cpu_tlb_fill sysemu only

2021-11-02 07:00:52 -04:00

rx

target/rx: Drop checks for singlestep_enabled

2021-10-15 16:39:14 -07:00

s390x

Merge remote-tracking branch 'remotes/vivier/tags/trivial-branch-for-6.2-pull-request' into staging

2021-11-03 11:24:09 -04:00

sh4

target/sh4: Set fault address in superh_cpu_do_unaligned_access

2021-11-02 07:00:52 -04:00

sparc

target/sparc: Set fault address in sparc_cpu_do_unaligned_access

2021-11-02 07:00:52 -04:00

tricore

target/tricore: Drop check for singlestep_enabled

2021-10-15 16:39:14 -07:00

xtensa

Merge remote-tracking branch 'remotes/vivier/tags/trivial-branch-for-6.2-pull-request' into staging

2021-11-03 11:24:09 -04:00

Kconfig

meson: Introduce target-specific Kconfig

2021-07-09 18:21:34 +02:00

meson.build

Drop the deprecated unicore32 target

2021-05-12 18:20:52 +02:00