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x86 queue, 2018-10-30 * MSR-based feature support for MSR_IA32_ARCH_CAPABILITIES bits (Robert Hoo) * Cascadelake-Server CPU model (Tao Xu) * Add PKU on Skylake-Server CPU model (Tao Xu) * Correct cpu_x86_cpuid(0xd) (Sebastian Andrzej Siewior) * Remove dead code (Peter Maydell) # gpg: Signature made Wed 31 Oct 2018 14:05:25 GMT # gpg: using RSA key 2807936F984DC5A6 # gpg: Good signature from "Eduardo Habkost <ehabkost@redhat.com>" # Primary key fingerprint: 5A32 2FD5 ABC4 D3DB ACCF D1AA 2807 936F 984D C5A6 * remotes/ehabkost/tags/x86-next-pull-request: i386: Add PKU on Skylake-Server CPU model i386: Add new model of Cascadelake-Server x86: define a new MSR based feature word -- FEATURE_WORDS_ARCH_CAPABILITIES x86: Data structure changes to support MSR based features kvm: Add support to KVM_GET_MSR_FEATURE_INDEX_LIST and KVM_GET_MSRS system ioctl target/i386: Remove #ifdeffed-out icebp debugging hack i386: correct cpu_x86_cpuid(0xd) Signed-off-by: Peter Maydell <peter.maydell@linaro.org>