Philippe Mathieu-Daudé 6a2b294314 target/openrisc: Move has_work() from CPUClass to SysemuCPUOps ...

Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Message-Id: <20250125170125.32855-15-philmd@linaro.org>

2025-03-09 17:00:47 +01:00

..

cpu-param.h

target/*: Remove TARGET_LONG_BITS from cpu-param.h

2025-02-08 12:41:33 -08:00

cpu-qom.h

target: Move ArchCPUClass definition to 'cpu.h'

2023-11-07 13:08:48 +01:00

cpu.c

target/openrisc: Move has_work() from CPUClass to SysemuCPUOps

2025-03-09 17:00:47 +01:00

cpu.h

accel/tcg: Move gen_intermediate_code to TCGCPUOps.translate_core

2024-12-24 08:32:15 -08:00

disas.c

meson: target

2020-08-21 06:30:35 -04:00

exception_helper.c

compiler.h: replace QEMU_NORETURN with G_NORETURN

2022-04-21 17:03:51 +04:00

exception.c

compiler.h: replace QEMU_NORETURN with G_NORETURN

2022-04-21 17:03:51 +04:00

exception.h

compiler.h: replace QEMU_NORETURN with G_NORETURN

2022-04-21 17:03:51 +04:00

fpu_helper.c

target/openrisc: Set PC to cpu state on FPU exception

2023-05-11 15:40:03 +01:00

gdbstub.c

gdbstub: Clarify no more than @gdb_num_core_regs can be accessed

2025-03-06 15:46:17 +01:00

helper.h

…

insns.decode

…

interrupt_helper.c

…

interrupt.c

target/openrisc: Prefer fast cpu_env() over slower CPU QOM cast macro

2024-03-12 12:04:24 +01:00

Kconfig

kconfig: express dependency of individual boards on libfdt

2024-05-10 15:45:15 +02:00

machine.c

target/openrisc: Constify VMState in machine.c

2023-12-29 11:17:30 +11:00

meson.build

meson: Rename target_softmmu_arch -> target_system_arch

2023-10-07 19:03:07 +02:00

mmu.c

exec: Declare tlb_set_page() in 'exec/cputlb.h'

2025-03-08 07:56:14 -08:00

sys_helper.c

exec: Declare tlb_flush*() in 'exec/cputlb.h'

2025-03-08 07:56:14 -08:00

translate.c

accel/tcg: Move gen_intermediate_code to TCGCPUOps.translate_core

2024-12-24 08:32:15 -08:00