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xemu/target/riscv
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Philippe Mathieu-Daudé 0f64fb6743 qemu: Declare all load/store helper in 'qemu/bswap.h' 
Restrict "exec/tswap.h" to the tswap*() methods,
move the load/store helpers with the other ones
declared in "qemu/bswap.h".

Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Reviewed-by: Pierrick Bouvier <pierrick.bouvier@linaro.org>
Message-Id: <20250708215320.70426-8-philmd@linaro.org>
Reviewed-by: Michael S. Tsirkin <mst@redhat.com>
Signed-off-by: Michael S. Tsirkin <mst@redhat.com>
2025-07-15 02:56:39 -04:00
..
insn_trans
target/riscv: Add a property to set vill bit on reserved usage of vsetvli instruction
2025-07-04 21:09:49 +10:00
kvm
target/riscv: use qemu_chr_fe_write_all() in DBCN_CONSOLE_WRITE_BYTE
2025-07-04 21:09:48 +10:00
tcg
target: riscv: Add Svrsw60t59b extension support
2025-07-04 21:09:49 +10:00
arch_dump.c
include: Rename sysemu/ -> system/
2024-12-20 17:44:56 +01:00
bitmanip_helper.c
codebase: prepare to remove cpu.h from exec/exec-all.h
2025-04-23 13:52:25 -07:00
common-semi-target.h
…
cpu_bits.h
target: riscv: Add Svrsw60t59b extension support
2025-07-04 21:09:49 +10:00
cpu_cfg_fields.h.inc
target: riscv: Add Svrsw60t59b extension support
2025-07-04 21:09:49 +10:00
cpu_cfg.h
target/riscv: include default value in cpu_cfg_fields.h.inc
2025-05-20 08:18:53 +02:00
cpu_helper.c
target: riscv: Add Svrsw60t59b extension support
2025-07-04 21:09:49 +10:00
cpu_user.h
target/riscv: zicfilp lpad impl and branch tracking
2024-10-30 11:22:08 +10:00
cpu_vendorid.h
…
cpu-param.h
tcg: Remove the TCG_GUEST_DEFAULT_MO definition globally
2025-04-23 15:07:32 -07:00
cpu-qom.h
target/riscv: Add BOSC's Xiangshan Kunminghu CPU
2025-07-04 21:09:49 +10:00
cpu.c
target: riscv: Add Svrsw60t59b extension support
2025-07-04 21:09:49 +10:00
cpu.h
target/riscv: Make PMP region count configurable
2025-07-04 21:09:48 +10:00
crypto_helper.c
include: Remove 'exec/exec-all.h'
2025-04-30 12:45:05 -07:00
csr.c
target/riscv: Fix MEPC/SEPC bit masking for IALIGN
2025-07-04 21:09:49 +10:00
debug.c
include: Remove 'exec/exec-all.h'
2025-04-30 12:45:05 -07:00
debug.h
target/riscv: Add textra matching condition for the triggers
2024-10-02 15:11:51 +10:00
fpu_helper.c
target/riscv: Fix fcvt.s.bf16 NaN box checking
2025-07-04 21:09:48 +10:00
gdbstub.c
target/riscv: store RISCVCPUDef struct directly in the class
2025-05-20 08:18:53 +02:00
helper.h
target/riscv: Add a property to set vill bit on reserved usage of vsetvli instruction
2025-07-04 21:09:49 +10:00
insn16.decode
target/riscv: compressed encodings for sspush and sspopchk
2024-10-30 11:22:08 +10:00
insn32.decode
target/riscv: Fix the rvv reserved encoding of unmasked instructions
2025-05-19 13:39:20 +10:00
instmap.h
…
internals.h
target/riscv: Fix MEPC/SEPC bit masking for IALIGN
2025-07-04 21:09:49 +10:00
Kconfig
target/riscv/cpu_helper: Fix linking problem with semihosting disabled
2024-10-02 15:11:51 +10:00
m128_helper.c
include: Remove 'exec/exec-all.h'
2025-04-30 12:45:05 -07:00
machine.c
target/riscv: Make PMP region count configurable
2025-07-04 21:09:48 +10:00
meson.build
…
monitor.c
target/riscv: remove break after g_assert_not_reached()
2024-09-24 13:53:35 +02:00
op_helper.c
target/riscv: Fix MEPC/SEPC bit masking for IALIGN
2025-07-04 21:09:49 +10:00
pmp.c
target/riscv: Make PMP region count configurable
2025-07-04 21:09:48 +10:00
pmp.h
target/riscv: Add new CSR fields for S{sn, mn, m}pm extensions as part of Zjpm v1.0
2025-01-19 09:44:34 +10:00
pmu.c
include/exec: Split out icount.h
2025-04-23 14:08:44 -07:00
pmu.h
target/riscv: More accurately model priv mode filtering.
2024-07-18 12:08:45 +10:00
riscv-qmp-cmds.c
target/riscv: add profile->present flag
2025-07-04 21:09:48 +10:00
sbi_ecall_interface.h
…
th_csr.c
target/riscv: generalize custom CSR functionality
2025-05-20 08:18:53 +02:00
time_helper.c
target/riscv: Enable/Disable S/VS-mode Timer when STCE bit is changed
2025-07-04 21:09:48 +10:00
time_helper.h
target/riscv: Enable/Disable S/VS-mode Timer when STCE bit is changed
2025-07-04 21:09:48 +10:00
trace-events
target/riscv: add trace in riscv_raise_exception()
2025-01-19 09:44:34 +10:00
trace.h
…
translate.c
target/riscv: support atomic instruction fetch (Ziccif)
2025-07-04 21:09:48 +10:00
vcrypto_helper.c
include: Remove 'exec/exec-all.h'
2025-04-30 12:45:05 -07:00
vector_helper.c
qemu: Declare all load/store helper in 'qemu/bswap.h'
2025-07-15 02:56:39 -04:00
vector_internals.c
target/riscv: refactor VSTART_CHECK_EARLY_EXIT() to accept vl as a parameter
2025-03-19 16:39:00 +10:00
vector_internals.h
target/riscv: refactor VSTART_CHECK_EARLY_EXIT() to accept vl as a parameter
2025-03-19 16:39:00 +10:00
xthead.decode
…
XVentanaCondOps.decode
…
zce_helper.c
include: Remove 'exec/exec-all.h'
2025-04-30 12:45:05 -07:00