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https://github.com/xemu-project/xemu.git
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Jamin Lin
0c1b423ac2
This commit moves the QCOM DC-SCM V1 BMC machine implementation out of aspeed.c into a new standalone file aspeed_ast2600_qcom-dc-scm-v1.c. This refactor continues the modularization effort for Aspeed platform support, placing each board’s logic in its own dedicated source file. It improves maintainability, readability, and simplifies future development for new platforms without cluttering aspeed.c. Key updates include: - Moved QCOM_DC_SCM_V1_BMC_HW_STRAP1 and QCOM_DC_SCM_V1_BMC_HW_STRAP2 macro into the new file aspeed_ast2600_qcom-dc-scm-v1.c. - Moved qcom_dc_scm_bmc_i2c_init() and aspeed_machine_qcom_dc_scm_v1_class_init() into the new file aspeed_ast2600_qcom-dc-scm-v1.c. - Moved "qcom-dc-scm-v1-bmc" machine type registration from aspeed.c to the new file. - Updated hw/arm/meson.build to include aspeed_ast2600_qcom-dc-scm-v1.c. - Cleaned up all QCOM DC-SCM V1-specific code from aspeed.c. No functional changes. Signed-off-by: Jamin Lin <jamin_lin@aspeedtech.com> Reviewed-by: Cédric Le Goater <clg@redhat.com> Link: https://lore.kernel.org/qemu-devel/20251104031325.146374-23-jamin_lin@aspeedtech.com Signed-off-by: Cédric Le Goater <clg@redhat.com>
56 lines
1.7 KiB
C
56 lines
1.7 KiB
C
/*
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* Qualcomm DC-SCM V1
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*
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* Copyright 2016 IBM Corp.
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*
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* SPDX-License-Identifier: GPL-2.0-or-later
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*/
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#include "qemu/osdep.h"
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#include "qapi/error.h"
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#include "hw/arm/machines-qom.h"
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#include "hw/arm/aspeed.h"
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#include "hw/arm/aspeed_soc.h"
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/* Qualcomm DC-SCM hardware value */
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#define QCOM_DC_SCM_V1_BMC_HW_STRAP1 0x00000000
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#define QCOM_DC_SCM_V1_BMC_HW_STRAP2 0x00000041
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static void qcom_dc_scm_bmc_i2c_init(AspeedMachineState *bmc)
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{
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AspeedSoCState *soc = bmc->soc;
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i2c_slave_create_simple(aspeed_i2c_get_bus(&soc->i2c, 15), "tmp105", 0x4d);
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}
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static void aspeed_machine_qcom_dc_scm_v1_class_init(ObjectClass *oc,
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const void *data)
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{
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MachineClass *mc = MACHINE_CLASS(oc);
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AspeedMachineClass *amc = ASPEED_MACHINE_CLASS(oc);
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mc->desc = "Qualcomm DC-SCM V1 BMC (Cortex A7)";
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mc->deprecation_reason = "use 'ast2600-evb' instead";
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amc->soc_name = "ast2600-a3";
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amc->hw_strap1 = QCOM_DC_SCM_V1_BMC_HW_STRAP1;
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amc->hw_strap2 = QCOM_DC_SCM_V1_BMC_HW_STRAP2;
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amc->fmc_model = "n25q512a";
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amc->spi_model = "n25q512a";
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amc->num_cs = 2;
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amc->macs_mask = ASPEED_MAC2_ON | ASPEED_MAC3_ON;
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amc->i2c_init = qcom_dc_scm_bmc_i2c_init;
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mc->default_ram_size = 1 * GiB;
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aspeed_machine_class_init_cpus_defaults(mc);
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};
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static const TypeInfo aspeed_ast2600_qcom_dc_scm_v1_types[] = {
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{
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.name = MACHINE_TYPE_NAME("qcom-dc-scm-v1-bmc"),
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.parent = TYPE_ASPEED_MACHINE,
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.class_init = aspeed_machine_qcom_dc_scm_v1_class_init,
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.interfaces = arm_machine_interfaces,
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}
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};
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DEFINE_TYPES(aspeed_ast2600_qcom_dc_scm_v1_types)
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