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Richard Henderson bd9154aa2b target/nios2: Create gen_jumpr 
Split out a function to perform an indirect branch.

Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Message-Id: <20220421151735.31996-49-richard.henderson@linaro.org>
 2022-04-26 08:17:05 -07:00
Richard Henderson 0706ac0f86 target/nios2: Enable unaligned traps for system mode 
Unaligned traps are optional, but required with an mmu.
Turn them on always, because the fallback behaviour undefined.

Enable alignment checks in the config file.
Unwind the guest pc properly from do_unaligned_access.

Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Message-Id: <20220421151735.31996-48-richard.henderson@linaro.org>
 2022-04-26 08:17:05 -07:00
Richard Henderson d2293ebb04 target/nios2: Drop CR_STATUS_EH from tb->flags 
There's nothing about EH that affects translation,
so there's no need to include it in tb->flags.

Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Message-Id: <20220421151735.31996-47-richard.henderson@linaro.org>
 2022-04-26 08:17:05 -07:00
Richard Henderson 7eed8e4003 target/nios2: Introduce dest_gpr 
Constrain all references to cpu_R[] to load_gpr and dest_gpr.
This will be required for supporting shadow register sets.

Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Message-Id: <20220421151735.31996-46-richard.henderson@linaro.org>
 2022-04-26 08:17:05 -07:00
Richard Henderson 541cb627da target/nios2: Split out helpers for gen_rr_shift 
Do as little work as possible within the macro.
Split out helper functions and pass in arguments instead.

Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
 2022-04-26 08:17:02 -07:00
Richard Henderson 3099c41bee target/nios2: Split out helpers for gen_rr_mul_high 
Rename the macro from gen_r_mul, because these are the multiply
variants that produce a high-part result.  Do as little work as
possible within the macro; split out helper functions and pass
in arguments instead.

Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
 2022-04-26 08:16:58 -07:00
Richard Henderson 7c849046af target/nios2: Split out helpers for gen_r_math_logic 
Split the macro in two, one for reg/imm and one for reg/reg.
Do as little work as possible within the macros; split out
helper functions and pass in arguments instead.

Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
 2022-04-26 08:16:55 -07:00
Richard Henderson cd419bc63d target/nios2: Split out helpers for gen_i_math_logic 
Do as little work as possible within the macro.
Split out helper functions and pass in arguments instead.

Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
 2022-04-26 08:16:52 -07:00
Richard Henderson 3d1f63d019 target/nios2: Split out helpers for gen_i_cmpxx 
Do as little work as possible within the macro.
Split out helper functions and pass in arguments instead.

Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
 2022-04-26 08:16:41 -07:00
Richard Henderson 1746338ed6 target/nios2: Split out named structs for [IRJ]_TYPE 
Currently the structures are anonymous within the macro.
Pull them out to standalone types.

Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
Message-Id: <20220421151735.31996-44-richard.henderson@linaro.org>
 2022-04-26 08:16:41 -07:00
Richard Henderson 718db07714 target/nios2: Use tcg_constant_tl 
Replace current uses of tcg_const_tl, and remove the frees.

Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Message-Id: <20220421151735.31996-43-richard.henderson@linaro.org>
 2022-04-26 08:16:41 -07:00
Richard Henderson 345b7a8757 target/nios2: Support division error exception 
Division may (optionally) raise a division exception.
Since the linux kernel has been prepared for this for
some time, enable it by default.

Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Message-Id: <20220421151735.31996-42-richard.henderson@linaro.org>
 2022-04-26 08:16:41 -07:00
Richard Henderson e8d12542ee target/nios2: Remove CPU_INTERRUPT_NMI 
This interrupt bit is never set, so testing it in
nios2_cpu_has_work is pointless.

Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Message-Id: <20220421151735.31996-41-richard.henderson@linaro.org>
 2022-04-26 08:16:41 -07:00
Richard Henderson 2de70d2d96 target/nios2: Implement CR_STATUS.RSIE 
Without EIC, this bit is RES1.  So set the bit at reset,
and add it to the readonly fields of CR_STATUS.

Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Message-Id: <20220421151735.31996-40-richard.henderson@linaro.org>
 2022-04-26 08:16:41 -07:00
Richard Henderson b05550af11 target/nios2: Implement cpuid 
Copy the existing cpu_index into the space reserved for CR_CPUID.

Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Message-Id: <20220421151735.31996-39-richard.henderson@linaro.org>
 2022-04-26 08:16:41 -07:00
Richard Henderson 796945d596 target/nios2: Prevent writes to read-only or reserved control fields 
Create an array of masks which detail the writable and readonly
bits for each control register.  Apply them when writing to
control registers, including the write to status during eret.

Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
Message-Id: <20220421151735.31996-38-richard.henderson@linaro.org>
 2022-04-26 08:16:41 -07:00
Richard Henderson be77e1d5fe target/nios2: Clean up handling of tlbmisc in do_exception 
The 4 lower bits, D, PERM, BAD, DBL, are unconditionally set on any
exception with EH=0, or so says Table 42 (Processor Status After
Taking Exception).

We currently do not set PERM or BAD at all, and only set/clear
DBL for tlb miss, and do not clear DBL for any other exception.

It is a bit confusing to set D in tlb_fill and the rest during
do_interrupt, so move the setting of D to do_interrupt as well.
To do this, split EXP_TLBD into two cases, EXCP_TLB_X and EXCP_TLB_D,
which allows us to distinguish them during do_interrupt.  Choose
a value for EXCP_TLB_D such that when truncated it produces the
correct value for exception.CAUSE.

Rename EXCP_TLB[RWX] to EXCP_PERM_[RWX], to emphasize that the
exception is permissions related.  Rename EXCP_SUPER[AD] to
EXCP_SUPERA_[DX] to emphasize that they are both "supervisor
address" exceptions, data and execute.

Retain the setting of tlbmisc.WE for the fast-tlb-miss path, as it
is being relied upon, but remove it from the permission path.

Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Message-Id: <20220421151735.31996-37-richard.henderson@linaro.org>
 2022-04-26 08:16:41 -07:00
Richard Henderson 34cccb7462 target/nios2: Cleanup set of CR_EXCEPTION for do_interrupt 
The register is entirely read-only for software, and we do not
implement ECC, so we need not deposit the cause into an existing
value; just create a new value from scratch.

Furthermore, exception.CAUSE is not written for break exceptions.

Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Message-Id: <20220421151735.31996-36-richard.henderson@linaro.org>
 2022-04-26 08:16:41 -07:00
Richard Henderson af95a70a06 target/nios2: Handle EXCP_UNALIGN and EXCP_UNALIGND 
While some of the plumbing for misaligned data is present, in the form
of nios2_cpu_do_unaligned_access, the hook will not be called because
TARGET_ALIGNED_ONLY is not set in configs/targets/nios2-softmmu.mak.

Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
Message-Id: <20220421151735.31996-35-richard.henderson@linaro.org>
 2022-04-26 08:16:41 -07:00
Richard Henderson 0e0824a1a9 target/nios2: Hoist CPU_LOG_INT logging 
Performing this early means that we can merge more cases
within the non-logging switch statement.

Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Message-Id: <20220421151735.31996-34-richard.henderson@linaro.org>
 2022-04-26 08:16:41 -07:00
Richard Henderson d8c5521cc4 target/nios2: Clean up nios2_cpu_do_interrupt 
Split out do_exception and do_iic_irq to handle bulk of the interrupt and
exception processing.  Parameterize the changes required to cpu state.

The status.EH bit, which protects some data against double-faults,
is only present with the MMU.  Several exception cases did not check
for status.EH being set, as required.

The status.IH bit, which had been set by EXCP_IRQ, is exclusive to
the external interrupt controller, which we do not yet implement.
The internal interrupt controller, when the MMU is also present,
sets the status.EH bit.

Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Message-Id: <20220421151735.31996-33-richard.henderson@linaro.org>
 2022-04-26 08:16:41 -07:00
Richard Henderson 24ca31346e target/nios2: Create EXCP_SEMIHOST for semi-hosting 
Decode 'break 1' during translation, rather than doing
it again during exception processing.

Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Message-Id: <20220421151735.31996-32-richard.henderson@linaro.org>
 2022-04-26 08:16:41 -07:00
Richard Henderson bdb307b4d8 target/nios2: Move R_FOO and CR_BAR into enumerations 
These symbols become available to the debugger.

Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Message-Id: <20220421151735.31996-31-richard.henderson@linaro.org>
 2022-04-26 08:16:41 -07:00
Richard Henderson 17c20fe3c8 target/nios2: Use hw/registerfields.h for CR_TLBMISC fields 
Use FIELD_EX32 and FIELD_DP32 instead of managing the
masking by hand.

Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Message-Id: <20220421151735.31996-30-richard.henderson@linaro.org>
 2022-04-26 08:16:41 -07:00
Richard Henderson 8036281527 target/nios2: Rename CR_TLBMISC_WR to CR_TLBMISC_WE 
WE is the architectural name of the field, not WR.

Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Message-Id: <20220421151735.31996-29-richard.henderson@linaro.org>
 2022-04-26 08:16:41 -07:00
Richard Henderson 9d63656354 target/nios2: Use hw/registerfields.h for CR_TLBACC fields 
Retain the helper macros for single bit fields as aliases to
the longer R_*_MASK names.  Use FIELD_EX32 and FIELD_DP32
instead of manually manipulating the fields.

Since we're rewriting the references to CR_TLBACC_IGN_* anyway,
we correct the name of this field to IG, which is its name in
the official CPU documentation.

Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Message-Id: <20220421151735.31996-28-richard.henderson@linaro.org>
 2022-04-26 08:16:41 -07:00
Richard Henderson 0a1fc63043 target/nios2: Use hw/registerfields.h for CR_TLBADDR fields 
Use FIELD_EX32 and FIELD_DP32 instead of manual manipulation
of the fields.

Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Message-Id: <20220421151735.31996-27-richard.henderson@linaro.org>
 2022-04-26 08:16:41 -07:00
Richard Henderson bf754c96b2 target/nios2: Use hw/registerfields.h for CR_EXCEPTION fields 
Use FIELD_DP32 instead of manual shifting and masking.

Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Message-Id: <20220421151735.31996-26-richard.henderson@linaro.org>
 2022-04-26 08:16:41 -07:00
Richard Henderson e96568a461 target/nios2: Use hw/registerfields.h for CR_STATUS fields 
Add all fields; retain the helper macros for single bit fields.
So far there are no uses of the multi-bit status fields.

Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Message-Id: <20220421151735.31996-25-richard.henderson@linaro.org>
 2022-04-26 08:16:41 -07:00
Richard Henderson 5dfb910d91 target/nios2: Clean up nios2_cpu_dump_state 
Do not print control registers for user-only mode.
Rename reserved control registers to "resN", where
N is the control register index.

Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Message-Id: <20220421151735.31996-24-richard.henderson@linaro.org>
 2022-04-26 08:16:41 -07:00
Richard Henderson b8f036a9fa target/nios2: Split control registers away from general registers 
Place the control registers into their own array, env->ctrl[].

Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Message-Id: <20220421151735.31996-23-richard.henderson@linaro.org>
 2022-04-26 08:16:41 -07:00
Richard Henderson e237ac34db target/nios2: Remove cpu_interrupts_enabled 
This function is unused.  The real computation of this value
is located in nios2_cpu_exec_interrupt.

Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Message-Id: <20220421151735.31996-22-richard.henderson@linaro.org>
 2022-04-26 08:16:41 -07:00
Richard Henderson dd4c6ee227 linux-user/nios2: Only initialize SP and PC in target_cpu_copy_regs 
Drop the set of estatus in init_thread; it was clearly intended
to be setting the value of CR_STATUS for the application, but we
never actually performed that copy.  However, the proper value is
set in nios2_cpu_reset so we don't need to do anything here.

We only initialize SP and EA in init_thread, there's no value in
copying other uninitialized data into ENV.

Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Message-Id: <20220421151735.31996-21-richard.henderson@linaro.org>
 2022-04-26 08:16:41 -07:00
Richard Henderson f1ec078f9a target/nios2: Do not create TCGv for control registers 
We don't need to reference them often, and when we do it
is just as easy to load/store from cpu_env directly.

Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Message-Id: <20220421151735.31996-20-richard.henderson@linaro.org>
 2022-04-26 08:16:41 -07:00
Richard Henderson 48da43b258 target/nios2: Fix BRET instruction 
We had failed to copy BSTATUS back to STATUS, and diagnose
supervisor-only.  The spec is light on the specifics of the
implementation of bret, but it is an easy assumption that
the restore into STATUS should work the same as eret.

Therefore, reuse the existing helper_eret.

Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
Reported-by: Peter Maydell <peter.maydell@linaro.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Message-Id: <20220421151735.31996-19-richard.henderson@linaro.org>
 2022-04-26 08:16:41 -07:00
Amir Gonnen 8d855c89d1 target/nios2: Split out helper for eret instruction 
The implementation of eret will become much more complex
with the introduction of shadow registers.

[rth: Split out of a larger patch for shadow register sets.
      Directly exit to the cpu loop from the helper.]

Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
Signed-off-by: Amir Gonnen <amir.gonnen@neuroblade.ai>
Message-Id: <20220303153906.2024748-3-amir.gonnen@neuroblade.ai>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Message-Id: <20220421151735.31996-18-richard.henderson@linaro.org>
 2022-04-26 08:16:41 -07:00
Richard Henderson 17a406eec5 target/nios2: Split PC out of env->regs[] 
It is cleaner to have a separate name for this variable.

Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Message-Id: <20220421151735.31996-17-richard.henderson@linaro.org>
 2022-04-26 08:16:41 -07:00
Amir Gonnen 5ea3e9975b target/nios2: Add NUM_GP_REGS and NUM_CP_REGS 
Split NUM_CORE_REGS into components that can be used elsewhere.

Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
Signed-off-by: Amir Gonnen <amir.gonnen@neuroblade.ai>
Message-Id: <20220303153906.2024748-3-amir.gonnen@neuroblade.ai>
[rth: Split out of a larger patch for shadow register sets.]
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Message-Id: <20220421151735.31996-16-richard.henderson@linaro.org>
 2022-04-26 08:16:41 -07:00
Richard Henderson 48b7eac207 target/nios2: Stop generating code if gen_check_supervisor fails 
Whether the cpu is in user-mode or not is something that we
know at translation-time.  We do not need to generate code
after having raised an exception.

Suggested-by: Peter Maydell <peter.maydell@linaro.org>
Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Message-Id: <20220421151735.31996-15-richard.henderson@linaro.org>
 2022-04-26 08:16:40 -07:00
Amir Gonnen b106e7b7e4 target/nios2: Check supervisor on eret 
eret instruction is only allowed in supervisor mode.

Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Signed-off-by: Amir Gonnen <amir.gonnen@neuroblade.ai>
Message-Id: <20220303153906.2024748-2-amir.gonnen@neuroblade.ai>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Message-Id: <20220421151735.31996-14-richard.henderson@linaro.org>
 2022-04-26 08:16:40 -07:00
Richard Henderson 3a0a43ec3c linux-user/nios2: Use force_sig_fault for EXCP_DEBUG 
Use the simpler signal interface, which forces us to supply
the missing PC value to si_addr.

Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
Message-Id: <20220421151735.31996-13-richard.henderson@linaro.org>
 2022-04-26 08:16:40 -07:00
Richard Henderson d2a11b40a4 target/nios2: Build helper.c for system only 
Remove the #ifdef !defined(CONFIG_USER_ONLY) that surrounds
the whole file, and move helper.c to nios2_softmmu_ss.

Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
Message-Id: <20220421151735.31996-12-richard.henderson@linaro.org>
 2022-04-26 08:16:40 -07:00
Richard Henderson fb4de9d235 target/nios2: Remove nios2_cpu_record_sigsegv 
Since f5ef0e518d, we have a real page mapped for kuser,
which means the special casing for SIGSEGV can go away.

Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
Message-Id: <20220421151735.31996-11-richard.henderson@linaro.org>
 2022-04-26 08:16:40 -07:00
Richard Henderson 3c818909b0 target/nios2: Remove user-only nios2_cpu_do_interrupt 
Since 7827168471, this function is unused for user-only,
when the TCGCPUOps.do_interrupt hook itself became system-only.

Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
Message-Id: <20220421151735.31996-10-richard.henderson@linaro.org>
 2022-04-26 08:16:40 -07:00
Richard Henderson 20e7524ff9 tests/tcg/nios2: Re-enable linux-user tests 
Now that threads and signals have been fixed, re-enable tests.

Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Message-Id: <20220421151735.31996-9-richard.henderson@linaro.org>
 2022-04-26 08:16:40 -07:00
Richard Henderson 1b5fb4d252 linux-user/nios2: Use QEMU_ESIGRETURN from do_rt_sigreturn 
Drop the kernel-specific "pr2" code structure and use
the qemu-specific error return value.

Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Message-Id: <20220421151735.31996-8-richard.henderson@linaro.org>
 2022-04-26 08:16:40 -07:00
Richard Henderson dfb810bcaa linux-user/nios2: Remove do_sigreturn 
There is no sigreturn syscall, only rt_sigreturn.
This function is unused.

Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Message-Id: <20220421151735.31996-7-richard.henderson@linaro.org>
 2022-04-26 08:16:40 -07:00
Richard Henderson b9ef5b3138 linux-user/nios2: Handle special qemu syscall return values 
Honor QEMU_ESIGRETURN and QEMU_ERESTARTSYS.

Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Message-Id: <20220421151735.31996-6-richard.henderson@linaro.org>
 2022-04-26 08:16:40 -07:00
Richard Henderson b3a219b70e linux-user/nios2: Adjust error return 
Follow the kernel assembly, which considers all negative
return values to be errors.

Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Message-Id: <20220421151735.31996-5-richard.henderson@linaro.org>
 2022-04-26 08:16:40 -07:00
Richard Henderson 66254caa42 linux-user/nios2: Drop syscall 0 "workaround" 
Syscall 0 is __NR_io_setup for this target; there is nothing
to work around.

Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
Fixes: a0a839b65b ("nios2: Add usermode binaries emulation")
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Message-Id: <20220421151735.31996-4-richard.henderson@linaro.org>
 2022-04-26 08:16:40 -07:00