Henrik RydgårdandClaude Opus 5.5 d712974701 JIT: Leave vidt.s and vidt.t to the interpreter ...

None of the legacy JITs handled them: the destination was mapped without
being written, so it kept whatever the host register held.

Co-Authored-By: Claude Opus 5.5 <noreply@anthropic.com>

2026-10-14 00:10:00 +02:00

..

ArmAsm.cpp

Keep JIT block entries and replacement hooks out of PSP memory

2026-10-11 10:33:30 +02:00

ArmCompALU.cpp

MIPS: INT_MIN / -1 leaves HI at zero, like the hardware

2026-09-22 11:02:20 -06:00

ArmCompBranch.cpp

Plumb through the PC value for syscalls, so we can get better diagnostics for unresolved ones.

2026-08-15 19:14:13 +02:00

ArmCompFPU.cpp

ARM JITs: Mask what ctc1 writes to fcr31

2026-09-29 11:09:47 -06:00

ArmCompLoadStore.cpp

Core: Let 16-bit CPU accesses through the depth mirrors see the GE's layout

2026-10-08 18:37:23 +02:00

ArmCompReplace.cpp

cmake: Detect features at compile time

2016-10-19 12:31:19 +02:00

ArmCompVFPU.cpp

JIT: Leave vidt.s and vidt.t to the interpreter

2026-10-14 00:10:00 +02:00

ArmJit.cpp

Rename the replacement pseudo-op, drop the leftover emuhack defines

2026-10-11 10:33:30 +02:00

ArmJit.h

Keep JIT block entries and replacement hooks out of PSP memory

2026-10-11 10:33:30 +02:00

ArmRegCache.cpp

Remove more vestiges of old experiments

2026-02-12 01:23:48 +01:00

ArmRegCache.h

Remove more vestiges of old experiments

2026-02-12 01:23:48 +01:00

ArmRegCacheFPU.cpp

mips/regcache: fix before check index after access data array by index

2026-04-28 10:55:55 +02:00

ArmRegCacheFPU.h

VFPU: vsqrt, vrsq, vrcp and vnrcp are exact in every backend

2026-09-24 12:24:42 -06:00