Henrik RydgårdandClaude Opus 5.5 21d3b29965 IR native JITs: Forget an invalidated block's links by their targets ...

linksTo_ maps an exit's target PC to the blocks exiting there, but
EraseAllLinks erased the entry keyed by the block number instead. The dead
block's exits were cleared anyway, so its stale entries only piled up until
the next cache clear.

Co-Authored-By: Claude Opus 5.5 (1M context) <noreply@anthropic.com>

2026-10-20 11:44:06 +02:00

..

ARM

CPU: Pass the MIPSState explicitly where it was already at hand

2026-10-20 09:47:48 +02:00

ARM64

CPU: Pass the MIPSState explicitly where it was already at hand

2026-10-20 09:47:48 +02:00

IR

IR native JITs: Forget an invalidated block's links by their targets

2026-10-20 11:44:06 +02:00

JitCommon

CPU: Let each MIPSState own its JIT

2026-10-20 09:52:17 +02:00

LoongArch64

CPU: Pass the MIPSState explicitly where it was already at hand

2026-10-20 09:47:48 +02:00

RiscV

CPU: Pass the MIPSState explicitly where it was already at hand

2026-10-20 09:47:48 +02:00

x86

CPU: Pass the MIPSState explicitly where it was already at hand

2026-10-20 09:47:48 +02:00

Interpreter.cpp

CPU: Let each MIPSState own its JIT

2026-10-20 09:52:17 +02:00

Interpreter.h

Rename the replacement pseudo-op, drop the leftover emuhack defines

2026-10-11 10:33:30 +02:00

InterpreterDispatch.cpp

Decode the unused bits of shifts and Allegrex bit ops as the PSP does

2026-10-14 10:56:48 +02:00

InterpreterDispatch.h

Plumb an explicit MIPSState *mips through the interpreter's Int_* handlers

2026-08-12 14:02:19 +02:00

InterpreterVFPU.cpp

VFPU: Drop the inaccurate dot product paths

2026-10-18 12:11:46 +02:00

InterpreterVFPU.h

Plumb an explicit MIPSState *mips through the interpreter's Int_* handlers

2026-08-12 14:02:19 +02:00

MIPS.cpp

CPU: Let each MIPSState own its JIT

2026-10-20 09:52:17 +02:00

MIPS.h

CPU: Let each MIPSState own its JIT

2026-10-20 09:52:17 +02:00

MIPSAnalyst.cpp

CPU: Pass the MIPSState explicitly where it was already at hand

2026-10-20 09:47:48 +02:00

MIPSAnalyst.h

SaveState: Only rehash functions in code a load changed

2026-10-19 20:18:46 +02:00

MIPSAsm.cpp

Make instruction cache invalidation (for us, jit cache invalidation) clearer

2026-08-16 16:59:52 +02:00

MIPSAsm.h

Fix the API for MIPSAssembleOpcode to remove a global

2025-11-03 16:08:07 +01:00

MIPSCodeUtils.cpp

Keep JIT block entries and replacement hooks out of PSP memory

2026-10-11 10:33:30 +02:00

MIPSCodeUtils.h

Decode the unused bits of shifts and Allegrex bit ops as the PSP does

2026-10-14 10:56:48 +02:00

MIPSDebugInterface.cpp

Debugger: Show replacement hooks in the disassembly again

2026-10-11 10:33:30 +02:00

MIPSDebugInterface.h

Win32 debugger: stop cutting off register values in CtrlRegisterList

2026-09-12 13:46:12 -06:00

MIPSDis.cpp

Decode the unused bits of shifts and Allegrex bit ops as the PSP does

2026-10-14 10:56:48 +02:00

MIPSDis.h

Rename the replacement pseudo-op, drop the leftover emuhack defines

2026-10-11 10:33:30 +02:00

MIPSDisVFPU.cpp

VFPU: vrnds takes its seed from the vs field

2026-10-15 00:09:25 +02:00

MIPSDisVFPU.h

Improve debugger assemble/disassemble compatiblity

2026-07-07 20:30:51 -04:00

MIPSStackWalk.cpp

Stack walk: Don't take an early return for the end of the previous function

2026-10-19 11:10:47 +02:00

MIPSStackWalk.h

Show a MIPS stack trace on crash screen (#17211)

2023-03-31 10:08:12 +02:00

MIPSTables.cpp

CPU: Pass the MIPSState explicitly where it was already at hand

2026-10-20 09:47:48 +02:00

MIPSTables.h

CPU: Pass the MIPSState explicitly where it was already at hand

2026-10-20 09:47:48 +02:00

MIPSTracer.cpp

MIPSTracer: don't index trace_info with stale block indices

2026-09-19 10:02:54 -06:00

MIPSTracer.h

MIPSTracer: don't index trace_info with stale block indices

2026-09-19 10:02:54 -06:00

MIPSVFPUUtils.cpp

CPU: Pass the MIPSState explicitly where it was already at hand

2026-10-20 09:47:48 +02:00

MIPSVFPUUtils.h

Debugger: Fix the Win32 VFPU window at high DPI, implement it in ImDebugger

2026-10-16 13:42:06 +02:00