mirror of
https://github.com/hrydgard/ppsspp.git
synced 2026-09-07 13:13:24 +02:00
Henrik Rydgård
e2ab84087e
System.cpp stamped BootState::Complete unconditionally after InitGPU(), overwriting the Failed that InitGPU sets when GPU_Init() fails - after it has already run CPU_Shutdown(). PSP_InitUpdate then took the success path on a core that no longer existed, down to a null Memory::base, and the first guest access dereferenced it. InitGPU now reports failure and both callers honor it. (The libretro path had the same problem from the other direction: it calls InitGPU after the Failed check.) HandleAssert called g_assertCancelCallback directly on the IDCANCEL path, without the null check its own BreakIntoPSPDebugger() helper does - and EmuScreen clears the callback when a game is unloaded. So any assert after returning to the menu turned "Cancel: skip and break into PPSSPP debugger" into a null jump, from the one button whose entire purpose is surviving the assert. __CheatDoState registered the cheat event type when the savestate had no CwCheat section, but never scheduled it. CoreTiming::DoState has already swapped in the state's event queue by then, which doesn't contain one either - so loading an old savestate silently killed cheats, and the enable/disable polling with them, for the rest of the session. Achievements::ChangeUMD set g_isIdentifying and returned without clearing it when hashing failed, leaving IsBlockingExecution() true forever - EmuScreen stops running the CPU and the game is frozen until restart. Reachable from a disc swap on any ISO whose PARAM.SFO or EBOOT.BIN can't be read. x64Analyzer routed opcode 0x88 into the write path but had no case for it, so it hit the default, logged from inside the crash handler, and failed. 0x88 is exactly what the x64 JIT emits for a guest sb, so MemFault could never skip or ignore a bad byte store the way it can a word one. Handle the 8-bit forms, and drop the 0x8a/0x8b cases in the read path that the same 0xF0 mask made unreachable. Covered by a new CheckAnalyze case, which fails without this change. 314 pspautotests pass, all unit tests pass.
82 lines
2.6 KiB
C
82 lines
2.6 KiB
C
// Copyright (C) 2003 Dolphin Project.
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// This program is free software: you can redistribute it and/or modify
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// it under the terms of the GNU General Public License as published by
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// the Free Software Foundation, version 2.0 or later versions.
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// This program is distributed in the hope that it will be useful,
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// but WITHOUT ANY WARRANTY; without even the implied warranty of
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// MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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// GNU General Public License 2.0 for more details.
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// A copy of the GPL 2.0 should have been included with the program.
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// If not, see http://www.gnu.org/licenses/
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// Official SVN repository and contact information can be found at
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// http://code.google.com/p/dolphin-emu/
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#pragma once
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#include "Common/CommonTypes.h"
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// What kind of register regOperandReg (and otherReg, if used as a source/dest rather than
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// just an address component) refers to, and thus how the instruction should be interpreted.
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enum class InstructionClass {
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GPR, // General-purpose register (mov, movzx, movsx, ...)
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FP, // Scalar floating point (movss, movsd, ...)
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FP_SIMD, // Full vector register (movups, movaps, movdqa, ...)
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};
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struct LSInstructionInfo {
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int operandSizeInBytes; // 1, 2, 4, 8 (in bytes, despite the field name suggesting bits)
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int instructionSize;
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int regOperandReg;
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int otherReg;
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int scaledReg;
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bool zeroExtend;
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bool signExtend;
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bool hasImmediate;
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bool isMemoryWrite;
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u64 immediate;
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s32 displacement;
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InstructionClass instructionClass;
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int OperandSizeInBytes() const { return operandSizeInBytes; }
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};
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struct ModRM
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{
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int mod, reg, rm;
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ModRM(u8 modRM, u8 rex)
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{
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mod = modRM >> 6;
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reg = ((modRM >> 3) & 7) | ((rex & 4)?8:0);
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rm = modRM & 7;
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}
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};
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enum {
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MOVZX_BYTE = 0xB6, //movzx on byte
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MOVZX_SHORT = 0xB7, //movzx on short
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MOVSX_BYTE = 0xBE, //movsx on byte
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MOVSX_SHORT = 0xBF, //movsx on short
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MOVE_8BIT = 0xC6, //move 8-bit immediate
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MOVE_16_32BIT = 0xC7, //move 16 or 32-bit immediate
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MOVE_REG_TO_MEM8 = 0x88, //move 8-bit reg to memory
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MOVE_REG_TO_MEM = 0x89, //move reg to memory
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MOVE_MEM_TO_REG8 = 0x8A, //move 8-bit memory to reg
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MOVE_MEM_TO_REG = 0x8B, //move memory to reg
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// These two opcodes are shared between MOVUPS (no mandatory prefix) and MOVSS (mandatory 0xF3 prefix).
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MOVUPS_MOVSS_FROM_RM = 0x10, //movups/movss xmm, xmm/m
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MOVUPS_MOVSS_TO_RM = 0x11, //movups/movss xmm/m, xmm
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MOVAPS_FROM_RM = 0x28, //movaps xmm, xmm/m
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MOVAPS_TO_RM = 0x29, //movaps xmm/m, xmm
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};
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enum AccessType {
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OP_ACCESS_READ = 0,
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OP_ACCESS_WRITE = 1
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};
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bool X86AnalyzeMOV(const unsigned char *codePtr, LSInstructionInfo &info);
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