mirror of
https://github.com/hrydgard/ppsspp.git
synced 2026-10-15 07:20:31 +02:00
Henrik RydgårdandClaude Opus 5.5
4163737bbc
Rewrites most of DisArm64.cpp. Previously missing: test-and-branch, exceptions other than brk, hints and barriers, adc/sbc, conditional compare, extr, literal loads, exclusives, unscaled and FP register offset loads, ldpsw, SIMD structure loads/stores, scalar pairwise, fixed-point conversions, fccmp, most two-reg misc ops, modified immediates, smov/umov/dup from GPR, and the scalar shift forms. Fixed: sp printed as x31, unsigned load offsets sign-extended, ldrsb and friends shown as stores, adrp ignoring the page, double precision 1-source ops shown as single, fcmpe shown as fcmp, smulh/umulh, the bitmask decode for 64-bit elements, and fpcr shown as fpsr. Common aliases are used now (cset, mul, tst, cmn, lsl/asr/ubfx, sxtw...). TestArm64Disasm runs two examples of every emitter function through it. The expected strings were verified with Tools/arm64_disasm_check.py, which compares all 833 instruction words against llvm-mc. Co-Authored-By: Claude Opus 5.5 (1M context) <noreply@anthropic.com>