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ppsspp/Core
Henrik RydgårdandClaude Opus 5.5 d5de19a120 FPU: Make the positive quiet NaN on x86 too
The PSP's add.s, sub.s, mul.s and div.s make 0x7FC00000 from operands
that aren't NaN (cpu/fpu/fpu_nan), as ARM64 does. x86 makes 0xFFC00000,
which only mul.s corrected, so the hosts disagreed on inf - inf and 0/0.
A NaN operand still comes through as the host passes it.

The x86 JITs check the result and branch past the fix unless it's a NaN.
They compare the operands up front only when the dest is one of them,
which also makes mul.s cheaper in the common case.

Co-Authored-By: Claude Opus 5.5 <noreply@anthropic.com>
2026-10-14 11:47:33 +02:00
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