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https://github.com/hrydgard/ppsspp.git
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Henrik RydgårdandClaude Opus 5.5
9d55b8046c
The audio hardware at 0xBE000000, as POPS's ME loop (popsman.prx +2F88) drives it: after setting it up, it writes one stereo sample (left in the low half) to 0x70 whenever status 0x28 bit 5 says the FIFO has room, and sleeps in halt in between on the ME's interrupt source 12. Measured from the ME on a PSP-1000 (pspautotest me/audiofifo): the FIFO holds 24 samples and plays them at 44.1kHz while 0x04 bit 1 is set; status 0x28 has bit 4 while playing, bit 5 while there's room, and bit 1 once it has played out its last sample, a sample after the FIFO empties; and source 12 is a level, up while there's room, which halt wakes on with interrupts disabled. What it plays is mixed into the output. A halted ME used to sleep until the main CPU's next slice. It now wakes within the slice when the full FIFO next has room, as POPS's loop sleeps for every sample. Co-Authored-By: Claude Opus 5.5 (1M context) <noreply@anthropic.com>
51 lines
2.0 KiB
C++
51 lines
2.0 KiB
C++
// Copyright (c) 2012- PPSSPP Project.
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// This program is free software: you can redistribute it and/or modify
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// it under the terms of the GNU General Public License as published by
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// the Free Software Foundation, version 2.0 or later versions.
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// This program is distributed in the hope that it will be useful,
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// but WITHOUT ANY WARRANTY; without even the implied warranty of
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// MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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// GNU General Public License 2.0 for more details.
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// A copy of the GPL 2.0 should have been included with the program.
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// If not, see http://www.gnu.org/licenses/
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// Official git repository and contact information can be found at
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// https://github.com/hrydgard/ppsspp and http://www.ppsspp.org/.
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// The registers homebrew's Media Engine code uses to run the ME and talk to it. Their state is the
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// ME's (MeCore::MEState); without an ME they're left unhandled, as before.
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#pragma once
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class MMIODevice;
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namespace MeMMIO {
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// Reset, bus clock, soft interrupt and hardware mutex (0xBC100000).
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MMIODevice *SysregDevice();
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// The ME's interrupt controller (0xBC300000). The main CPU has its own there.
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MMIODevice *InterruptDevice();
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// DMACplus (0xBC800000): DMA between the CPUs' memories, and the LCD.
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MMIODevice *DmacplusDevice();
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// Clock dividers (0xBC200000).
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MMIODevice *ClockDevice();
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// The VME's control registers (0xBCC00000), its status always done.
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MMIODevice *VmeControlDevice();
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// Memory protection (0xBC000000), which the ME's startup code unlocks.
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MMIODevice *MemProtectDevice();
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// The DDR controller's flush register (0xBD000004), always done.
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MMIODevice *DdrDevice();
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// The audio block (0xBE000000), which the ME feeds in a POPS boot.
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MMIODevice *AudioDevice();
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// Plays what's due by the ME's clock, and sets the ME's audio interrupt level.
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void AudioUpdate(s64 now);
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// When a full FIFO next has room, in ME ticks, or INT64_MAX.
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s64 AudioNextEvent();
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// Adds up to count of the samples it played to a stereo mix.
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void AudioMix(s32 *mix, int count);
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} // namespace MeMMIO
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