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https://github.com/hrydgard/ppsspp.git
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Henrik RydgårdandClaude Opus 5.5
b7b4a265b7
The interpreter's MMIO dispatch was a hardcoded chain for GPIO and the syscon serial port. Devices now register an address range in Core/HW/MMIO and get each access with its width and the MIPSState making it, for registers that answer each CPU differently. An access no device handles is logged and reads as poison, as before. GPIO and syscon serial become the first two devices. They're reset at boot, which they never were, and saved in savestates (SaveStart section version 4). ll/sc, lwl/lwr and lwc1/swc1 reach MMIO in the interpreter too, and kernel blocks leave lwc1/swc1 to it like the other loads and stores. swl/swr and lv/sv still treat it as a bad address. TestMMIO runs a kernel-mode access on each core and the registers through a savestate. Co-Authored-By: Claude Opus 5.5 (1M context) <noreply@anthropic.com>
96 lines
3.0 KiB
C++
96 lines
3.0 KiB
C++
// Copyright (c) 2012- PPSSPP Project.
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// This program is free software: you can redistribute it and/or modify
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// it under the terms of the GNU General Public License as published by
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// the Free Software Foundation, version 2.0 or later versions.
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// This program is distributed in the hope that it will be useful,
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// but WITHOUT ANY WARRANTY; without even the implied warranty of
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// MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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// GNU General Public License 2.0 for more details.
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// A copy of the GPL 2.0 should have been included with the program.
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// If not, see http://www.gnu.org/licenses/
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// Official git repository and contact information can be found at
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// https://github.com/hrydgard/ppsspp and http://www.ppsspp.org/.
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#include <vector>
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#include "Common/Log.h"
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#include "Common/Serialize/Serializer.h"
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#include "Core/Core.h"
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#include "Core/HW/GpioMMIO.h"
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#include "Core/HW/MMIO.h"
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#include "Core/MemMap.h"
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#include "Core/MIPS/MIPS.h"
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namespace MMIO {
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// Unhandled reads return a distinctive poison value (not 0) so it's obvious in a live trace when
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// some later computation's input traces back to an unimplemented register, rather than looking
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// like an ordinary, legitimate zero.
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constexpr u32 UNKNOWN_MMIO_POISON = 0x1337BEEF;
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static std::vector<MMIODevice *> g_devices;
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void Init() {
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g_devices = {
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GpioMMIO::Device(),
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SysconSerialMMIO::Device(),
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};
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for (MMIODevice *device : g_devices) {
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device->Reset();
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}
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}
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void Shutdown() {
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g_devices.clear();
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}
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void DoState(PointerWrap &p) {
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auto s = p.Section("MMIO", 1, 1);
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if (!s)
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return;
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// Every device, whether or not this boot registered it, so the layout doesn't depend on that.
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GpioMMIO::Device()->DoState(p);
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SysconSerialMMIO::Device()->DoState(p);
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}
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static MMIODevice *FindDevice(u32 address) {
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for (MMIODevice *device : g_devices) {
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if (device->Contains(address))
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return device;
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}
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return nullptr;
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}
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static bool CheckKernelMode(MIPSState *mips, u32 address, int size, MemoryExceptionType type) {
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if (Memory::IsKernelCodeAddress(mips->pc))
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return true;
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Core_MemoryException(address, size, mips->pc, type, "Kernel mode only");
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return false;
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}
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u32 Read(MIPSState *mips, u32 address, int size) {
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if (!CheckKernelMode(mips, address, size, MemoryExceptionType::READ_WORD))
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return UNKNOWN_MMIO_POISON;
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MMIODevice *device = FindDevice(address);
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u32 value;
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if (device && device->Read(mips, address - device->Base(), size, &value))
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return value;
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WARN_LOG(Log::CPU, "Unhandled MMIO Read%d at %08x%s%s", size * 8, address, device ? " in " : "", device ? device->Name() : "");
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return UNKNOWN_MMIO_POISON;
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}
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void Write(MIPSState *mips, u32 address, int size, u32 value) {
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if (!CheckKernelMode(mips, address, size, MemoryExceptionType::WRITE_WORD))
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return;
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MMIODevice *device = FindDevice(address);
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if (device && device->Write(mips, address - device->Base(), size, value))
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return;
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WARN_LOG(Log::CPU, "Unhandled MMIO Write%d at %08x = %08x%s%s", size * 8, address, value, device ? " in " : "", device ? device->Name() : "");
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}
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} // namespace MMIO
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