Unknown W. Brackets 5afc020fbd x86jit: Force INF * 0 to +NAN. ...

See #12519 - this is needed for some graphics to render properly.  Seems
to already happen on ARM, so no change to armjit.

2020-04-06 06:33:39 -07:00

..

Asm.cpp

jit: Remove unused breakpoint code.

2018-06-06 17:31:56 -07:00

CompALU.cpp

Jit: Respect flags for jit types and features.

2019-02-03 14:57:08 -08:00

CompBranch.cpp

Reduce a ERROR_LOG_REPORT to a warning (vfpu branches in delay slots)

2017-11-11 19:39:44 +01:00

CompFPU.cpp

x86jit: Force INF * 0 to +NAN.

2020-04-06 06:33:39 -07:00

CompLoadStore.cpp

Jit: Respect flags for jit types and features.

2019-02-03 14:57:08 -08:00

CompReplace.cpp

Get rid of ugly alignment macros and some other cruft, we now have alignas(16) from C++11

2017-08-31 01:14:51 +02:00

CompVFPU.cpp

Compat: Option to use accurate dotprod for VMMUL.

2019-08-05 11:44:52 -07:00

IRToX86.cpp

cmake: Detect features at compile time

2016-10-19 12:31:19 +02:00

IRToX86.h

Add missing cases to simplify pass

2016-05-15 23:39:42 +02:00

Jit.cpp

Style fix

2019-06-02 16:22:19 +02:00

Jit.h

jit: Remove unused breakpoint code.

2018-06-06 17:31:56 -07:00

JitSafeMem.cpp

Debugger: Add memory breakpoint management.

2018-06-08 06:59:18 -07:00

JitSafeMem.h

SafeMem: Remove the "far" optimization that saves 3 bytes sometimes but is really dangerous and not worth the complexity.

2017-08-30 09:58:30 +02:00

RegCache.cpp

X64/X86: Even more use of the context register

2017-07-05 13:21:35 +02:00

RegCache.h

Fix various minor warnings.

2016-03-20 14:17:51 -07:00

RegCacheFPU.cpp

More RIP fixes

2017-07-07 15:46:14 +02:00

RegCacheFPU.h

Improve an assert message that AkiraJkr saw. Fix a silly bug in the last commit.

2019-08-23 18:42:10 +02:00