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ppsspp/Core
Henrik RydgårdandClaude Fable 5.1 ae81a20c74 arm64 JIT: mtvc to the VFPU condition register keeps six bits
The other control registers were masked already; the CC path wasn't, so
a value with bits 6 or 7 set made bvt 6 and bvt 7 branch. Hardware never
sets those (cpu/vfpu/vbranch), and the IR masks them.

Co-Authored-By: Claude Fable 5.1 <noreply@anthropic.com>
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