Henrik RydgårdandClaude Opus 5.5 ad6f0ceea2 ARM JIT: Fix mtvc masking and vsgn of denormals, and interpret vh2f ...

mtvc masks the written control register like the other JITs, vsgn tests the
exponent (so a denormal gives 0, as in the interpreter), and the hardware
half-to-float conversion quiets NaNs, so vh2f goes to the interpreter.

Co-Authored-By: Claude Opus 5.5 <noreply@anthropic.com>

2026-10-14 12:29:49 +02:00

..

ARM

ARM JIT: Fix mtvc masking and vsgn of denormals, and interpret vh2f

2026-10-14 12:29:49 +02:00

ARM64

VFPU: vcmov with imm3 = 7 tests a CC bit that is always clear

2026-10-14 11:59:35 +02:00

fake

Drop unused Config.h and SmallDataConvert.h includes

2026-10-13 12:13:42 +02:00

IR

VFPU: vcmov with imm3 = 7 tests a CC bit that is always clear

2026-10-14 11:59:35 +02:00

JitCommon

ARM disassembler: Rewrite, cover everything the emitter can emit, add a test

2026-10-13 22:23:14 +02:00

LoongArch64

VFPU: vmin and vmax order zeros and denormals as equal, on every core

2026-10-14 11:59:35 +02:00

RiscV

VFPU: vmin and vmax order zeros and denormals as equal, on every core

2026-10-14 11:59:35 +02:00

x86

VFPU: vcmov with imm3 = 7 tests a CC bit that is always clear

2026-10-14 11:59:35 +02:00

Interpreter.cpp

Decode the unused bits of shifts and Allegrex bit ops as the PSP does

2026-10-14 10:56:48 +02:00

Interpreter.h

Rename the replacement pseudo-op, drop the leftover emuhack defines

2026-10-11 10:33:30 +02:00

InterpreterDispatch.cpp

Decode the unused bits of shifts and Allegrex bit ops as the PSP does

2026-10-14 10:56:48 +02:00

InterpreterDispatch.h

Plumb an explicit MIPSState *mips through the interpreter's Int_* handlers

2026-08-12 14:02:19 +02:00

InterpreterVFPU.cpp

VFPU: vcmov with imm3 = 7 tests a CC bit that is always clear

2026-10-14 11:59:35 +02:00

InterpreterVFPU.h

Plumb an explicit MIPSState *mips through the interpreter's Int_* handlers

2026-08-12 14:02:19 +02:00

MIPS.cpp

IR interpreter: Force the host's mode back in RestoreRoundingMode

2026-10-14 09:26:29 +02:00

MIPS.h

IR interpreter: Force the host's mode back in RestoreRoundingMode

2026-10-14 09:26:29 +02:00

MIPSAnalyst.cpp

MIPSAnalyst: Only writes to the CC register clobber the VFPU condition

2026-10-14 00:10:00 +02:00

MIPSAnalyst.h

Savestate: Rehash analyzed functions before writing replacements on load

2026-09-28 09:34:06 -06:00

MIPSAsm.cpp

Make instruction cache invalidation (for us, jit cache invalidation) clearer

2026-08-16 16:59:52 +02:00

MIPSAsm.h

Fix the API for MIPSAssembleOpcode to remove a global

2025-11-03 16:08:07 +01:00

MIPSCodeUtils.cpp

Keep JIT block entries and replacement hooks out of PSP memory

2026-10-11 10:33:30 +02:00

MIPSCodeUtils.h

Decode the unused bits of shifts and Allegrex bit ops as the PSP does

2026-10-14 10:56:48 +02:00

MIPSDebugInterface.cpp

Debugger: Show replacement hooks in the disassembly again

2026-10-11 10:33:30 +02:00

MIPSDebugInterface.h

Win32 debugger: stop cutting off register values in CtrlRegisterList

2026-09-12 13:46:12 -06:00

MIPSDis.cpp

Decode the unused bits of shifts and Allegrex bit ops as the PSP does

2026-10-14 10:56:48 +02:00

MIPSDis.h

Rename the replacement pseudo-op, drop the leftover emuhack defines

2026-10-11 10:33:30 +02:00

MIPSDisVFPU.cpp

Fix assembly/disassembly for various VFPU opcodes

2026-08-11 10:10:56 -04:00

MIPSDisVFPU.h

Improve debugger assemble/disassemble compatiblity

2026-07-07 20:30:51 -04:00

MIPSStackWalk.cpp

Keep JIT block entries and replacement hooks out of PSP memory

2026-10-11 10:33:30 +02:00

MIPSStackWalk.h

Show a MIPS stack trace on crash screen (#17211)

2023-03-31 10:08:12 +02:00

MIPSTables.cpp

MIPSTables: Include <algorithm> and <string_view> for the dispatch generator

2026-10-14 11:05:42 +02:00

MIPSTables.h

Plumb an explicit MIPSState *mips through the interpreter's Int_* handlers

2026-08-12 14:02:19 +02:00

MIPSTracer.cpp

MIPSTracer: don't index trace_info with stale block indices

2026-09-19 10:02:54 -06:00

MIPSTracer.h

MIPSTracer: don't index trace_info with stale block indices

2026-09-19 10:02:54 -06:00

MIPSVFPUUtils.cpp

x86 JIT: Gate more VFPU ops on prefixes like the IR, fix sc zero and vmmul crashes

2026-10-14 00:10:00 +02:00

MIPSVFPUUtils.h

VFPU: vmin and vmax order zeros and denormals as equal, on every core

2026-10-14 11:59:35 +02:00