Henrik RydgårdandClaude Opus 5.5 11296d32b1 CPU: Give each MIPSState an address space for its memory accesses ...

Memory::AddressSpace is where a CPU's addresses point (base) and its block
shadow, with the unchecked accessors and block shadow helpers as methods. The
main CPU's is Memory::g_mainSpace, kept in step with Memory::base and
blockShadow, and MIPSState::space points at it.

The CPU cores now go through their state's space instead of the globals: the
interpreter's and IR interpreter's loads and stores (which also saves the IR
interpreter reloading the global base), the IR interpreter's block lookup,
the block table's shadow entries, and the native JITs' memory base register,
block shadow lookups and pointerified registers. Address validity and
everything outside the cores still use the globals.

No change for the main CPU; this is so another CPU (the Media Engine) can see
memory differently. Benchmarked against master (God of War: Chains of
Olympus, Tekken 6): JIT instructions retired within noise, IR interpreter
2% fewer.

Co-Authored-By: Claude Opus 5.5 (1M context) <noreply@anthropic.com>

2026-10-20 18:41:28 +02:00

..

X64IRAsm.cpp

CPU: Give each MIPSState an address space for its memory accesses

2026-10-20 18:41:28 +02:00

X64IRCompALU.cpp

MIPS: INT_MIN / -1 leaves HI at zero, like the hardware

2026-09-22 11:02:20 -06:00

X64IRCompBranch.cpp

x86jit: Implement syscalls and some system.

2023-08-25 00:01:02 -07:00

X64IRCompFPU.cpp

x86-64 IR JIT: Keep NaNs through vsat0 and the [0:1] prefix

2026-10-14 22:05:21 +02:00

X64IRCompLoadStore.cpp

CPU: Give each MIPSState an address space for its memory accesses

2026-10-20 18:41:28 +02:00

X64IRCompSystem.cpp

CPU: Give each MIPSState an address space for its memory accesses

2026-10-20 18:41:28 +02:00

X64IRCompVec.cpp

VFPU: Drop the inaccurate dot product paths

2026-10-18 12:11:46 +02:00

X64IRJit.cpp

IR JITs: Split the IR interpreter out, and keep IR to it

2026-10-20 12:09:16 +02:00

X64IRJit.h

IR JITs: Split the IR interpreter out, and keep IR to it

2026-10-20 12:09:16 +02:00

X64IRRegCache.cpp

CPU: Give each MIPSState an address space for its memory accesses

2026-10-20 18:41:28 +02:00

X64IRRegCache.h

x86-64 IR JIT: Call the dot routine with the operands in registers

2026-10-14 22:30:37 +02:00

X64VfpuDot.h

x86-64 IR JIT: Address the dot routine's operands from CTXREG's offset

2026-10-14 23:10:59 +02:00