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Henrik RydgårdandClaude Opus 5.5
53ac2c7c56
Kernel code's loads and stores may reach hardware registers, which only the interpreter handled, so the IR frontend sent every one of them (in kernel blocks, only run by the VSH boot) to it. They now become LoadKernel*/StoreKernel* IR ops (one per size, like the plain loads and stores), which check at run time whether the address is memory or a hardware register (MMIO). After constant propagation, ResolveKernelMemory turns the ones at a constant address that's plain memory into ordinary loads and stores, so only the hardware registers, and addresses only known at run time, stay checked. The native JITs run the two ops through their IR fallback. They're barriers, since a register access has side effects, but can't change the GPRs, so constants stay known across. The kernel mode check for MMIO moves to the interpreter, the only caller that can run user code there. TestMMIO covers the new paths and which accesses stay checked. Under --vsh, the JIT and the interpreter now make the same unhandled register accesses, in the same numbers. Co-Authored-By: Claude Opus 5.5 (1M context) <noreply@anthropic.com>
25 lines
1.5 KiB
C
25 lines
1.5 KiB
C
#pragma once
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#include "Core/MIPS/IR/IRInst.h"
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typedef bool (*IRPassFunc)(const IRWriter &in, IRWriter &out, const IROptions &opts);
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bool IRApplyPasses(const IRPassFunc *passes, size_t c, const IRWriter &in, IRWriter &out, const IROptions &opts);
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// Block optimizer passes of varying usefulness.
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bool RemoveLoadStoreLeftRight(const IRWriter &in, IRWriter &out, const IROptions &opts);
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bool PropagateConstants(const IRWriter &in, IRWriter &out, const IROptions &opts);
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bool PurgeTemps(const IRWriter &in, IRWriter &out, const IROptions &opts);
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bool ReduceLoads(const IRWriter &in, IRWriter &out, const IROptions &opts);
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bool ThreeOpToTwoOp(const IRWriter &in, IRWriter &out, const IROptions &opts);
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bool OptimizeFPMoves(const IRWriter &in, IRWriter &out, const IROptions &opts);
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bool ReorderLoadStore(const IRWriter &in, IRWriter &out, const IROptions &opts);
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bool MergeLoadStore(const IRWriter &in, IRWriter &out, const IROptions &opts);
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bool ApplyMemoryValidation(const IRWriter &in, IRWriter &out, const IROptions &opts);
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bool ReduceVec4Flush(const IRWriter &in, IRWriter &out, const IROptions &opts);
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bool OptimizeLoadsAfterStores(const IRWriter &in, IRWriter &out, const IROptions &opts);
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// Kernel code's loads and stores at a constant address become plain ones where that's memory, so only
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// hardware registers (and addresses only known when it runs) stay LoadKernel*/StoreKernel*.
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bool ResolveKernelMemory(const IRWriter &in, IRWriter &out, const IROptions &opts);
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bool OptimizeForInterpreter(const IRWriter &in, IRWriter &out, const IROptions &opts);
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