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Henrik RydgårdandClaude Opus 5.5
6d122f416e
The JITs used to find a block by overwriting its first instruction with an "emuhack" holding the offset into the code space, and replacement functions installed their own emuhack the same way. Anything that read code (savestates, the debugger, memory dumps, cheats, the function hasher, games reading their own code) had to translate them back. Blocks now live in a block shadow: one u32 per guest instruction, indexed by the PC masked with BLOCK_SHADOW_MASK (1GB on 64-bit, folding the kernel and uncached mirrors; 256MB on 32-bit, iOS and Switch, where address space is short), with the low bits cleared so a misaligned PC can't read across two entries. Only the ranges under memory views are committed, so a bad PC still faults in the dispatcher, and the shadow is reserved before the memory map so it can't land in a gap of the 4GB window. Entries hold full 32-bit offsets, lifting the 16MB limit. The dispatchers on every backend, and the IR interpreter's loop, look blocks up there. A hooked instruction without a compiled block gets the JIT's hook value in its entry: the offset of the dispatcher's compile path (1 for the interpreters, the IR arena keeping that offset empty), so dispatching there compiles a block, and the frontends substitute the hook. Compiling replaces the entry with the block's, and destroying the block puts the hook value back. The hook value is rewritten when the JIT changes or regenerates its dispatcher. Hooks live in a map keyed by the masked address, and are dropped when the game overwrites the hooked instruction, or when an icache invalidation finds the function's hash (immediates masked, as when matching it) changed. Those checks run when queued invalidations are processed, since cheats and the debugger queue them before writing. Installing and removing hooks invalidates deferred, as it happens in HLE calls that can run inside a block. The cache instruction goes through MIPSState, so it drops changed hooks too. With clean memory, the save/clear/restore around savestates, memory reads and dumps goes away, as do the source-range invalidations in the memcpy replacements, sceDmac and the cheats. Co-Authored-By: Claude Opus 5.5 (1M context) <noreply@anthropic.com>
174 lines
6.5 KiB
C++
174 lines
6.5 KiB
C++
// Copyright (c) 2012- PPSSPP Project.
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// This program is free software: you can redistribute it and/or modify
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// it under the terms of the GNU General Public License as published by
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// the Free Software Foundation, version 2.0 or later versions.
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// This program is distributed in the hope that it will be useful,
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// but WITHOUT ANY WARRANTY; without even the implied warranty of
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// MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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// GNU General Public License 2.0 for more details.
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// A copy of the GPL 2.0 should have been included with the program.
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// If not, see http://www.gnu.org/licenses/
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// Official git repository and contact information can be found at
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// https://github.com/hrydgard/ppsspp and http://www.ppsspp.org/.
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#pragma once
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#include <string>
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#include <vector>
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#include "Common/CommonTypes.h"
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#include "Core/MemMap.h"
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#include "Core/MIPS/MIPS.h"
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// TODO: Find a better place for these.
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std::vector<std::string> DisassembleArm2(const u8 *data, int size);
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std::vector<std::string> DisassembleArm64(const u8 *data, int size);
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std::vector<std::string> DisassembleX86(const u8 *data, int size);
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std::vector<std::string> DisassembleRV64(const u8 *data, int size);
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std::vector<std::string> DisassembleLA64(const u8 *data, int size);
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struct JitBlock;
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class JitBlockCache;
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class JitBlockCacheDebugInterface;
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class PointerWrap;
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class MIPSState;
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namespace MIPSComp {
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void JitAt(MIPSState *mips);
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class MIPSFrontendInterface {
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public:
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virtual ~MIPSFrontendInterface() {}
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virtual void EatPrefix() = 0;
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virtual void Comp_Generic(MIPSOpcode op) = 0;
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virtual void Comp_ReplacementFunc(MIPSOpcode op) = 0;
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virtual void Comp_ITypeMem(MIPSOpcode op) = 0;
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virtual void Comp_StoreSync(MIPSOpcode op) = 0;
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virtual void Comp_Cache(MIPSOpcode op) = 0;
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virtual void Comp_RelBranch(MIPSOpcode op) = 0;
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virtual void Comp_RelBranchRI(MIPSOpcode op) = 0;
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virtual void Comp_FPUBranch(MIPSOpcode op) = 0;
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virtual void Comp_FPULS(MIPSOpcode op) = 0;
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virtual void Comp_FPUComp(MIPSOpcode op) = 0;
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virtual void Comp_Jump(MIPSOpcode op) = 0;
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virtual void Comp_JumpReg(MIPSOpcode op) = 0;
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virtual void Comp_Syscall(MIPSOpcode op) = 0;
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virtual void Comp_Break(MIPSOpcode op) = 0;
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virtual void Comp_IType(MIPSOpcode op) = 0;
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virtual void Comp_RType2(MIPSOpcode op) = 0;
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virtual void Comp_RType3(MIPSOpcode op) = 0;
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virtual void Comp_ShiftType(MIPSOpcode op) = 0;
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virtual void Comp_Allegrex(MIPSOpcode op) = 0;
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virtual void Comp_Allegrex2(MIPSOpcode op) = 0;
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virtual void Comp_VBranch(MIPSOpcode op) = 0;
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virtual void Comp_MulDivType(MIPSOpcode op) = 0;
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virtual void Comp_Special3(MIPSOpcode op) = 0;
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virtual void Comp_FPU3op(MIPSOpcode op) = 0;
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virtual void Comp_FPU2op(MIPSOpcode op) = 0;
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virtual void Comp_mxc1(MIPSOpcode op) = 0;
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virtual void Comp_SV(MIPSOpcode op) = 0;
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virtual void Comp_SVQ(MIPSOpcode op) = 0;
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virtual void Comp_VPFX(MIPSOpcode op) = 0;
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virtual void Comp_VVectorInit(MIPSOpcode op) = 0;
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virtual void Comp_VMatrixInit(MIPSOpcode op) = 0;
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virtual void Comp_VDot(MIPSOpcode op) = 0;
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virtual void Comp_VecDo3(MIPSOpcode op) = 0;
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virtual void Comp_VV2Op(MIPSOpcode op) = 0;
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virtual void Comp_Mftv(MIPSOpcode op) = 0;
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virtual void Comp_Vmfvc(MIPSOpcode op) = 0;
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virtual void Comp_Vmtvc(MIPSOpcode op) = 0;
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virtual void Comp_Vmmov(MIPSOpcode op) = 0;
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virtual void Comp_VScl(MIPSOpcode op) = 0;
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virtual void Comp_Vmmul(MIPSOpcode op) = 0;
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virtual void Comp_Vmscl(MIPSOpcode op) = 0;
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virtual void Comp_Vtfm(MIPSOpcode op) = 0;
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virtual void Comp_VHdp(MIPSOpcode op) = 0;
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virtual void Comp_VCrs(MIPSOpcode op) = 0;
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virtual void Comp_VDet(MIPSOpcode op) = 0;
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virtual void Comp_Vi2x(MIPSOpcode op) = 0;
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virtual void Comp_Vx2i(MIPSOpcode op) = 0;
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virtual void Comp_Vf2i(MIPSOpcode op) = 0;
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virtual void Comp_Vi2f(MIPSOpcode op) = 0;
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virtual void Comp_Vh2f(MIPSOpcode op) = 0;
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virtual void Comp_Vcst(MIPSOpcode op) = 0;
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virtual void Comp_Vhoriz(MIPSOpcode op) = 0;
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virtual void Comp_VRot(MIPSOpcode op) = 0;
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virtual void Comp_VIdt(MIPSOpcode op) = 0;
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virtual void Comp_Vcmp(MIPSOpcode op) = 0;
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virtual void Comp_Vcmov(MIPSOpcode op) = 0;
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virtual void Comp_Viim(MIPSOpcode op) = 0;
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virtual void Comp_Vfim(MIPSOpcode op) = 0;
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virtual void Comp_VCrossQuat(MIPSOpcode op) = 0;
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virtual void Comp_Vsgn(MIPSOpcode op) = 0;
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virtual void Comp_Vocp(MIPSOpcode op) = 0;
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virtual void Comp_ColorConv(MIPSOpcode op) = 0;
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virtual void Comp_Vbfy(MIPSOpcode op) = 0;
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virtual void Comp_DoNothing(MIPSOpcode op) = 0;
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virtual int Replace_fabsf() = 0;
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};
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class JitInterface {
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public:
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virtual ~JitInterface() {}
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virtual const u8 *GetCodeBase() const = 0; // Just for displaying in the debugger.
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virtual bool CodeInRange(const u8 *ptr) const = 0;
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virtual bool DescribeCodePtr(const u8 *ptr, std::string &name) = 0;
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virtual bool IsAtDispatchFetch(const u8 *ptr) const {
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return false;
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}
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virtual const u8 *GetDispatcher() const = 0;
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virtual const u8 *GetCrashHandler() const = 0;
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virtual JitBlockCache *GetBlockCache() = 0;
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virtual JitBlockCacheDebugInterface *GetBlockCacheDebugInterface() = 0;
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virtual void InvalidateCacheAt(u32 em_address, int length = 4) = 0;
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virtual void DoState(PointerWrap &p) = 0;
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virtual void RunLoopUntil(u64 globalticks) = 0;
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virtual void Compile(u32 em_address) = 0;
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virtual void ClearCache() = 0;
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virtual void UpdateFCR31() = 0;
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// What the block shadow holds for a replacement hook without a compiled block. The
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// dispatcher has to send this to the compiler.
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virtual u32 GetBlockShadowHookValue() const { return Memory::BLOCK_SHADOW_HOOK_NO_JIT; }
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// Block linking. This may need to work differently for whole-function JITs and stuff
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// like that.
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virtual void LinkBlock(u8 *exitPoint, const u8 *entryPoint) = 0;
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virtual void UnlinkBlock(u8 *checkedEntry, u32 originalAddress) = 0;
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};
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typedef void (MIPSFrontendInterface::*MIPSCompileFunc)(MIPSOpcode opcode);
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typedef int (MIPSFrontendInterface::*MIPSReplaceFunc)();
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struct BranchInfo {
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BranchInfo(u32 pc, MIPSOpcode op, MIPSOpcode delaySlotOp, bool andLink, bool likely);
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u32 compilerPC;
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MIPSOpcode op;
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MIPSOpcode delaySlotOp;
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u64 delaySlotInfo;
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bool likely;
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bool andLink;
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// Update manually if it's not always nice (rs/rt, rs/zero, etc.)
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bool delaySlotIsNice = true;
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bool delaySlotIsBranch;
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};
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// This seems to be the same for all branch types.
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u32 ResolveNotTakenTarget(const BranchInfo &branchInfo);
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extern JitInterface *jit;
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void DoDummyJitState(PointerWrap &p);
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JitInterface *CreateNativeJit(MIPSState *mipsState, bool useIR);
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}
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