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The JITs used to find a block by overwriting its first instruction with an "emuhack" holding the offset into the code space, and replacement functions installed their own emuhack the same way. Anything that read code (savestates, the debugger, memory dumps, cheats, the function hasher, games reading their own code) had to translate them back. Blocks now live in a block shadow: one u32 per guest instruction, indexed by the PC masked with BLOCK_SHADOW_MASK (1GB on 64-bit, folding the kernel and uncached mirrors; 256MB on 32-bit, iOS and Switch, where address space is short), with the low bits cleared so a misaligned PC can't read across two entries. Only the ranges under memory views are committed, so a bad PC still faults in the dispatcher, and the shadow is reserved before the memory map so it can't land in a gap of the 4GB window. Entries hold full 32-bit offsets, lifting the 16MB limit. The dispatchers on every backend, and the IR interpreter's loop, look blocks up there. A hooked instruction without a compiled block gets the JIT's hook value in its entry: the offset of the dispatcher's compile path (1 for the interpreters, the IR arena keeping that offset empty), so dispatching there compiles a block, and the frontends substitute the hook. Compiling replaces the entry with the block's, and destroying the block puts the hook value back. The hook value is rewritten when the JIT changes or regenerates its dispatcher. Hooks live in a map keyed by the masked address, and are dropped when the game overwrites the hooked instruction, or when an icache invalidation finds the function's hash (immediates masked, as when matching it) changed. Those checks run when queued invalidations are processed, since cheats and the debugger queue them before writing. Installing and removing hooks invalidates deferred, as it happens in HLE calls that can run inside a block. The cache instruction goes through MIPSState, so it drops changed hooks too. With clean memory, the save/clear/restore around savestates, memory reads and dumps goes away, as do the source-range invalidations in the memcpy replacements, sceDmac and the cheats. Co-Authored-By: Claude Opus 5.5 (1M context) <noreply@anthropic.com>
261 lines
7.3 KiB
C++
261 lines
7.3 KiB
C++
// Copyright (c) 2012- PPSSPP Project.
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// This program is free software: you can redistribute it and/or modify
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// it under the terms of the GNU General Public License as published by
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// the Free Software Foundation, version 2.0 or later versions.
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// This program is distributed in the hope that it will be useful,
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// but WITHOUT ANY WARRANTY; without even the implied warranty of
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// MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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// GNU General Public License 2.0 for more details.
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// A copy of the GPL 2.0 should have been included with the program.
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// If not, see http://www.gnu.org/licenses/
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// Official git repository and contact information can be found at
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// https://github.com/hrydgard/ppsspp and http://www.ppsspp.org/.
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#pragma once
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#include <cstring>
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#include <unordered_map>
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#include "Common/CommonTypes.h"
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#include "Common/CPUDetect.h"
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#include "Core/MIPS/JitCommon/JitBlockCache.h"
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#include "Core/MIPS/JitCommon/JitCommon.h"
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#include "Core/MIPS/IR/IRRegCache.h"
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#include "Core/MIPS/IR/IRFrontend.h"
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#include "Core/MIPS/MIPSVFPUUtils.h"
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#ifndef offsetof
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#include "stddef.h"
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#endif
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// Very expensive, time-profiles every block.
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// Not to be released with this enabled.
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//
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// #define IR_PROFILING
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// Try to catch obvious misses of be above rule.
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#if defined(IR_PROFILING) && defined(GOLD)
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#error
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#endif
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struct IRInst;
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namespace MIPSComp {
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// TODO : Use arena allocators. For now let's just malloc.
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class IRBlock {
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public:
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IRBlock() {}
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IRBlock(u32 emAddr, u32 origSize, int instOffset, u32 numInstructions)
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: origAddr_(emAddr), origSize_(origSize), arenaOffset_(instOffset), numIRInstructions_(numInstructions) {}
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IRBlock(IRBlock &&b) noexcept {
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arenaOffset_ = b.arenaOffset_;
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hash_ = b.hash_;
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origAddr_ = b.origAddr_;
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origSize_ = b.origSize_;
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origFirstOpcode_ = b.origFirstOpcode_;
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nativeOffset_ = b.nativeOffset_;
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numIRInstructions_ = b.numIRInstructions_;
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b.arenaOffset_ = 0xFFFFFFFF;
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}
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~IRBlock() {}
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u32 GetIRArenaOffset() const { return arenaOffset_; }
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int GetNumIRInstructions() const { return numIRInstructions_; }
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MIPSOpcode GetOriginalFirstOp() const { return origFirstOpcode_; }
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bool IsValid() const { return origAddr_ != 0 && origFirstOpcode_.encoding != 0x68FFFFFF; }
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void SetNativeOffset(int offset) {
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nativeOffset_ = offset;
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}
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int GetNativeOffset() const {
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return nativeOffset_;
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}
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void UpdateHash() {
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hash_ = CalculateHash();
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}
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bool HashMatches() const {
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return origAddr_ && hash_ == CalculateHash();
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}
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bool OverlapsRange(u32 addr, u32 size) const;
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void GetRange(u32 *start, u32 *size) const {
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*start = origAddr_;
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*size = origSize_;
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}
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u32 GetOriginalStart() const {
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return origAddr_;
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}
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u64 GetHash() const {
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return hash_;
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}
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void Finalize(int number);
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void Destroy(int number);
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#ifdef IR_PROFILING
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JitBlockProfileStats profileStats_{};
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#endif
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private:
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u64 CalculateHash() const;
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// Offset into the block cache's Arena
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u32 arenaOffset_ = 0;
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// Offset into the native code buffer.
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int nativeOffset_ = -1;
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u64 hash_ = 0;
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u32 origAddr_ = 0;
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u32 origSize_ = 0;
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MIPSOpcode origFirstOpcode_ = MIPSOpcode(0x68FFFFFF);
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u32 numIRInstructions_ = 0;
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};
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class IRBlockCache : public JitBlockCacheDebugInterface {
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public:
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IRBlockCache(bool compileToNative);
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~IRBlockCache() {
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Clear();
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}
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void Clear();
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std::vector<int> FindInvalidatedBlockNumbers(u32 address, u32 length);
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void FinalizeBlock(int blockNum);
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int GetNumBlocks() const override { return (int)blocks_.size(); }
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int AllocateBlock(int emAddr, u32 origSize, const std::vector<IRInst> &inst);
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IRBlock *GetBlock(int blockNum) {
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if (blockNum >= 0 && blockNum < (int)blocks_.size()) {
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return &blocks_[blockNum];
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} else {
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return nullptr;
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}
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}
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void RemoveBlockFromPageLookup(int blockNum);
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int GetBlockNumFromIRArenaOffset(int offset) const;
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const IRInst *GetBlockInstructionPtr(const IRBlock &block) const {
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return arena_.data() + block.GetIRArenaOffset();
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}
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const IRInst *GetBlockInstructionPtr(int blockNum) const {
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return arena_.data() + blocks_[blockNum].GetIRArenaOffset();
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}
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const IRInst *GetArenaPtr() const {
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return arena_.data();
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}
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bool IsValidBlock(int blockNum) const override {
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return blockNum >= 0 && blockNum < (int)blocks_.size() && blocks_[blockNum].IsValid();
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}
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IRBlock *GetBlockUnchecked(int blockNum) {
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return &blocks_[blockNum];
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}
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const IRBlock *GetBlock(int blockNum) const {
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if (blockNum >= 0 && blockNum < (int)blocks_.size()) {
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return &blocks_[blockNum];
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} else {
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return nullptr;
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}
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}
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int FindPreloadBlock(u32 em_address);
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// "Cookie" means the value the block shadow holds for a block: its offset into the
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// IR arena, or into the native code space when compiling to native.
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int FindByCookie(int cookie);
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JitBlockDebugInfo GetBlockDebugInfo(int blockNum) const override;
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JitBlockMeta GetBlockMeta(int blockNum) const override {
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JitBlockMeta meta{};
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if (IsValidBlock(blockNum)) {
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meta.valid = true;
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blocks_[blockNum].GetRange(&meta.addr, &meta.sizeInBytes);
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}
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return meta;
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}
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JitBlockProfileStats GetBlockProfileStats(int blockNum) const override {
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#ifdef IR_PROFILING
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return blocks_[blockNum].profileStats_;
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#else
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return JitBlockProfileStats{};
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#endif
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}
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void ComputeStats(BlockCacheStats &bcStats) const override;
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int GetBlockNumberFromStartAddress(u32 em_address) const override;
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bool SupportsProfiling() const override {
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#ifdef IR_PROFILING
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return true;
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#else
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return false;
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#endif
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}
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private:
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u32 AddressToPage(u32 addr) const;
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bool compileToNative_;
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std::vector<IRBlock> blocks_;
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std::vector<IRInst> arena_;
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std::unordered_map<u32, std::vector<int>> byPage_;
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};
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class IRJit : public JitInterface {
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public:
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IRJit(MIPSState *mipsState, bool actualJit);
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~IRJit();
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void DoState(PointerWrap &p) override;
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const JitOptions &GetJitOptions() { return jo; }
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void RunLoopUntil(u64 globalticks) override;
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void Compile(u32 em_address) override; // Compiles a block at current MIPS PC
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bool DescribeCodePtr(const u8 *ptr, std::string &name) override;
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// Not using a regular block cache.
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JitBlockCache *GetBlockCache() override { return nullptr; }
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JitBlockCacheDebugInterface *GetBlockCacheDebugInterface() override { return &blocks_; }
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void ClearCache() override;
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void InvalidateCacheAt(u32 em_address, int length = 4) override;
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void UpdateFCR31() override;
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bool CodeInRange(const u8 *ptr) const override {
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return false;
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}
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const u8 *GetDispatcher() const override { return nullptr; }
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const u8 *GetCrashHandler() const override { return nullptr; }
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void LinkBlock(u8 *exitPoint, const u8 *checkedEntry) override;
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void UnlinkBlock(u8 *checkedEntry, u32 originalAddress) override;
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// This gets overridden by the native-backed IR jits.
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const u8 *GetCodeBase() const override { return nullptr; }
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protected:
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bool CompileBlock(u32 em_address, std::vector<IRInst> &instructions, u32 &mipsBytes);
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virtual bool CompileNativeBlock(IRBlockCache *irBlockCache, int block_num) { return true; }
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virtual void FinalizeNativeBlock(IRBlockCache *irBlockCache, int block_num) {}
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virtual void InvalidateNativeBlock(IRBlockCache *irBlockCache, int block_num) {}
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bool compileToNative_;
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JitOptions jo;
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IRFrontend frontend_;
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IRBlockCache blocks_;
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MIPSState *mips_;
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bool compilerEnabled_ = true;
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// where to write branch-likely trampolines. not used atm
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// u32 blTrampolines_;
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// int blTrampolineCount_;
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};
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} // namespace MIPSComp
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