Henrik RydgårdandClaude Opus 5.5 8ca487910e IR: vc2i and vuc2i read their source at the size encoded ...

They read one lane, the first of the source vector at the size in the
instruction, as the interpreter does, which for the pair and quad
encodings is another register than the single the IR took.

Co-Authored-By: Claude Opus 5.5 (1M context) <noreply@anthropic.com>

2026-10-15 09:55:35 +02:00

..

ARM

ARM32 IR JIT: Call a NEON dot routine for the accurate dot products

2026-10-14 22:30:37 +02:00

ARM64

Remove FakeJit and the pre-IR JitBlockCache

2026-10-15 02:24:25 +02:00

IR

IR: vc2i and vuc2i read their source at the size encoded

2026-10-15 09:55:35 +02:00

JitCommon

Remove FakeJit and the pre-IR JitBlockCache

2026-10-15 02:24:25 +02:00

LoongArch64

Remove FakeJit and the pre-IR JitBlockCache

2026-10-15 02:24:25 +02:00

RiscV

Remove FakeJit and the pre-IR JitBlockCache

2026-10-15 02:24:25 +02:00

x86

Remove FakeJit and the pre-IR JitBlockCache

2026-10-15 02:24:25 +02:00

Interpreter.cpp

Decode the unused bits of shifts and Allegrex bit ops as the PSP does

2026-10-14 10:56:48 +02:00

Interpreter.h

Rename the replacement pseudo-op, drop the leftover emuhack defines

2026-10-11 10:33:30 +02:00

InterpreterDispatch.cpp

Decode the unused bits of shifts and Allegrex bit ops as the PSP does

2026-10-14 10:56:48 +02:00

InterpreterDispatch.h

Plumb an explicit MIPSState *mips through the interpreter's Int_* handlers

2026-08-12 14:02:19 +02:00

InterpreterVFPU.cpp

VFPU: vfim converts its half float like vh2f

2026-10-15 09:55:35 +02:00

InterpreterVFPU.h

Plumb an explicit MIPSState *mips through the interpreter's Int_* handlers

2026-08-12 14:02:19 +02:00

MIPS.cpp

VFPU: Decode prefixes with shared helpers

2026-10-14 21:34:05 +02:00

MIPS.h

ARM64 IR JIT: Run Vec4VfpuDot through a shared routine

2026-10-14 22:30:36 +02:00

MIPSAnalyst.cpp

MIPSAnalyst: Only writes to the CC register clobber the VFPU condition

2026-10-14 00:10:00 +02:00

MIPSAnalyst.h

Savestate: Rehash analyzed functions before writing replacements on load

2026-09-28 09:34:06 -06:00

MIPSAsm.cpp

Make instruction cache invalidation (for us, jit cache invalidation) clearer

2026-08-16 16:59:52 +02:00

MIPSAsm.h

Fix the API for MIPSAssembleOpcode to remove a global

2025-11-03 16:08:07 +01:00

MIPSCodeUtils.cpp

Keep JIT block entries and replacement hooks out of PSP memory

2026-10-11 10:33:30 +02:00

MIPSCodeUtils.h

Decode the unused bits of shifts and Allegrex bit ops as the PSP does

2026-10-14 10:56:48 +02:00

MIPSDebugInterface.cpp

Debugger: Show replacement hooks in the disassembly again

2026-10-11 10:33:30 +02:00

MIPSDebugInterface.h

Win32 debugger: stop cutting off register values in CtrlRegisterList

2026-09-12 13:46:12 -06:00

MIPSDis.cpp

Decode the unused bits of shifts and Allegrex bit ops as the PSP does

2026-10-14 10:56:48 +02:00

MIPSDis.h

Rename the replacement pseudo-op, drop the leftover emuhack defines

2026-10-11 10:33:30 +02:00

MIPSDisVFPU.cpp

VFPU: vrnds takes its seed from the vs field

2026-10-15 00:09:25 +02:00

MIPSDisVFPU.h

Improve debugger assemble/disassemble compatiblity

2026-07-07 20:30:51 -04:00

MIPSStackWalk.cpp

Keep JIT block entries and replacement hooks out of PSP memory

2026-10-11 10:33:30 +02:00

MIPSStackWalk.h

Show a MIPS stack trace on crash screen (#17211)

2023-03-31 10:08:12 +02:00

MIPSTables.cpp

MIPSTables: Include <algorithm> and <string_view> for the dispatch generator

2026-10-14 11:05:42 +02:00

MIPSTables.h

Plumb an explicit MIPSState *mips through the interpreter's Int_* handlers

2026-08-12 14:02:19 +02:00

MIPSTracer.cpp

MIPSTracer: don't index trace_info with stale block indices

2026-09-19 10:02:54 -06:00

MIPSTracer.h

MIPSTracer: don't index trace_info with stale block indices

2026-09-19 10:02:54 -06:00

MIPSVFPUUtils.cpp

VFPU: vfim converts its half float like vh2f

2026-10-15 09:55:35 +02:00

MIPSVFPUUtils.h

VFPU: vfim converts its half float like vh2f

2026-10-15 09:55:35 +02:00