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Henrik RydgårdandClaude Opus 5.5
fef84cf0ca
MeCore owns a second MIPSState in the ME's address space, held in reset until released (SetReset). It runs on the interpreter, a slice behind the main CPU: CoreTiming runs it for the cycles the main CPU has just used, in Advance and ForceCheck. Its own PRId (COP0 22) and mfic/mtic flag; MMIO counts as kernel mode on it, and a syscall stops it with an error rather than reaching HLE. The interpreter's block stepping reads delay slots through the stepping CPU's memory, and cache instructions log at verbose level, as ME code flushes its caches in a loop. Created at boot only for homebrew (PBP with MG category or no SFO, ELF; the VSH counts, as vshmain.prx loads as an ELF), when "Enable ME emulation for homebrew" is on: a global checkbox in developer settings, off by default and not translated yet, or --me-core. Saved in its own section after MMIO (SaveStart v5), with its own memory; loading a state creates or removes the ME to match. The boot page now starts with a reset stub that sends the ME on to 0xBFC00040, where homebrew puts its code (from the firmware's reset code, read on a PSP-1000). Co-Authored-By: Claude Opus 5.5 (1M context) <noreply@anthropic.com>
61 lines
2.1 KiB
C++
61 lines
2.1 KiB
C++
// Copyright (c) 2012- PPSSPP Project.
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// This program is free software: you can redistribute it and/or modify
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// it under the terms of the GNU General Public License as published by
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// the Free Software Foundation, version 2.0 or later versions.
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// This program is distributed in the hope that it will be useful,
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// but WITHOUT ANY WARRANTY; without even the implied warranty of
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// MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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// GNU General Public License 2.0 for more details.
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// A copy of the GPL 2.0 should have been included with the program.
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// If not, see http://www.gnu.org/licenses/
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// Official git repository and contact information can be found at
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// https://github.com/hrydgard/ppsspp and http://www.ppsspp.org/.
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// The Media Engine, the PSP's second Allegrex. The firmware runs its codecs on it, and homebrew
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// whatever it likes. It runs in its own address space (Memory::CreateMESpace()), on the
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// interpreter, a slice behind the main CPU: CoreTiming runs it for the cycles the main CPU has just
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// used. Only emulated for homebrew, when enabled; commercial games get the HLE codecs.
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#pragma once
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#include "Common/CommonTypes.h"
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#include "Core/MIPS/MIPS.h"
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class PointerWrap;
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namespace MeCore {
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struct MEState {
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MIPSState cpu;
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// Held in reset until the main CPU releases it.
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bool inReset = true;
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// The ME's clock is tickBase - cpu.downcount.
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s64 tickBase = 0;
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// mfic/mtic's interrupt enable, which is per CPU.
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u32 interruptEnable = 0;
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};
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// Null when the ME isn't emulated.
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extern MEState *g_meState;
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// Whether the config and this boot (homebrew) want the ME.
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bool Wanted(bool homebrew);
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// Creates the ME, in reset. Fails on platforms without an ME address space.
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bool Init();
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void Shutdown();
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// Creates or removes the ME to match the state.
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void DoState(PointerWrap &p);
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// Runs the ME for the cycles the main CPU has just run.
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void RunFor(int cycles);
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// Asserting reset stops the ME. Releasing it starts the ME at the reset vector.
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void SetReset(bool asserted);
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// Count (COP0 register 9) on the ME.
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u64 GetTicks();
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} // namespace MeCore
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