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Henrik RydgårdandClaude Sonnet 5
ffad0acea1
All ~82 MIPSInt::Int_* functions (Interpreter.cpp/.h, InterpreterVFPU.cpp/.h) now take an explicit MIPSState *mips instead of reaching for the global currentMIPS internally, along with their file-local helpers (DelayBranchTo, SkipLikely, ApplySwizzleS/T, ApplyPrefixD/ST, RetainInvalidSwizzleST, EatPrefixes). MIPSInterpretFunc, Interpret(), ExecInstruction()/InterpreterDispatch.cpp (regenerated), and RunUntilFast() all thread mips through accordingly. Deliberately left on currentMIPS for now: MIPSVFPUUtils.cpp's ReadVector/WriteVector/ReadMatrix/WriteMatrix/VFPURewritePrefix - these are shared with every JIT backend's compile-time VFPU code, so parameterizing them would balloon this into a JIT-wide refactor. This is a partial refactor; that's the next boundary to push on. Several JIT backends (x86 Jit.cpp, ARM/ArmJit.cpp, ARM64/Arm64Jit.cpp, x86/X64IRJit.cpp, RiscV/RiscVJit.cpp, LoongArch64/LoongArch64Jit.cpp, ARM64/Arm64IRJit.cpp) bake the raw interpreter function pointer directly into JIT-generated machine code as their "fall back to the interpreter for this one op" mechanism, with only a single argument register set up for the call. Rather than hand-editing register allocation across four architectures that can't be build-tested here, added MIPSInterpretTrampoline(MIPSOpcode op) - a 1-arg wrapper around MIPSInterpret(currentMIPS, op) - and pointed all 7 such call sites at it instead, leaving that codegen untouched. Two other call sites (JitLogMiss, JitBranchLog) were plain C++ calls and just got the extra argument directly. Verified (Windows x64): PPSSPPWindows/PPSSPPHeadless/UnitTest all build clean, 49/49 unit tests pass. `test.py -g --graphics=software`: interpreter 312/314 (cpu/fpu/fpu is the pre-existing, unrelated interpreter-vs-JIT denormal difference; gpu/rendertarget/copy passes standalone, so was cross-test state bleed in the batch run, not a regression), default JIT 314/314, jit-ir 313/314 (gpu/vertices/morph is an expected difference from the vertex decoder taking a different mode with this core change, not a bug). Co-Authored-By: Claude Sonnet 5 <noreply@anthropic.com> Claude-Session: https://claude.ai/code/session_019SKhm9wKEQzRUsx9mTrrtQ