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Henrik RydgårdandClaude Opus 5.5
6e475258da
The native dispatcher generated for the ME leaves when its downcount runs out instead of calling CoreTiming::Advance, and IRNativeJit gets RunDowncount. Pointerify is decided from the CPU's own memory base. ARM32, RISC-V and LoongArch64 still give the ME the IR interpreter. LoadKernel/StoreKernel are now compiled on ARM64 and x64 rather than going through the IR interpreter one op at a time: memory directly, or a call to fixed code (which saves the caller-saved registers guest values live in) for 0xBC000000-0xBFFFFFFF. ARM64's block size estimate counts them as such. The 16-bit ones stay generic while the software renderer's depth mirrors are active, as Load16/Store16 do. That matters for the main CPU's kernel code too, and for all code while the ME is emulated, which runs in kernel mode everywhere. mcidclan's me-soft-interrupt went from 476 billion to 6.4 billion host instructions for 3 emulated seconds, ending with the same ME counter as the IR interpreter. The ME unit tests run on the native JIT too. Co-Authored-By: Claude Opus 5.5 (1M context) <noreply@anthropic.com>
37 lines
1.1 KiB
C++
37 lines
1.1 KiB
C++
#pragma once
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#include "Common/CommonTypes.h"
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#include "Core/Core.h"
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#include "Core/MemMap.h"
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class MIPSState;
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struct IRInst;
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u32 IRRunBreakpoint(u32 pc);
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u32 IRRunMemCheck(u32 pc, u32 addr);
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// A LoadKernel*/StoreKernel* (op) to an address the native JITs don't access directly: a hardware
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// register, or not memory at all.
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u32 IRRunKernelLoad(MIPSState *mips, u32 addr, u32 op);
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void IRRunKernelStore(MIPSState *mips, u32 addr, u32 value, u32 op);
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template <uint32_t alignment>
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u32 RunValidateAddress(u32 pc, u32 addr, u32 isWrite) {
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static_assert(alignment <= 16);
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const auto toss = [&](MemoryExceptionType t) {
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Core_MemoryException(addr, alignment, pc, t);
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return coreState != CORE_RUNNING_CPU ? 1 : 0;
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};
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if (!Memory::IsValidNAlignedAddress<alignment>(addr)) {
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MemoryExceptionType t = isWrite == 1 ? MemoryExceptionType::WRITE_WORD : MemoryExceptionType::READ_WORD;
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if constexpr (alignment > 4)
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t = isWrite ? MemoryExceptionType::WRITE_BLOCK : MemoryExceptionType::READ_BLOCK;
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return toss(t);
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}
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if constexpr (alignment > 1)
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if ((addr & (alignment - 1)) != 0)
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return toss(MemoryExceptionType::ALIGNMENT);
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return 0;
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}
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