mirror of
https://github.com/hrydgard/ppsspp.git
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Henrik RydgårdandClaude Opus 5.5
8af7643efa
The calls homebrew starts the ME with (1.50's NIDs, and 3.71's for the ME's reset and bus clock) set or clear a bit of the reset or bus clock register the way the firmware's driver does, returning whether it was set. Only those NIDs, so a later firmware's lowio.prx keeps its own exports under --vsh. Kernel modules copy their ME code to the boot page with SysclibForKernel's memcpy, which now goes through MMIO for hardware addresses like the replaced memcpy already did (MMIO::Copy, shared). pspsdk's mebasic, MElib's test, PSP Bunny, snes9xTYL and ProTrekkr's test now start their ME. Co-Authored-By: Claude Opus 5.5 (1M context) <noreply@anthropic.com>
74 lines
2.9 KiB
C++
74 lines
2.9 KiB
C++
// Copyright (c) 2012- PPSSPP Project.
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// This program is free software: you can redistribute it and/or modify
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// it under the terms of the GNU General Public License as published by
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// the Free Software Foundation, version 2.0 or later versions.
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// This program is distributed in the hope that it will be useful,
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// but WITHOUT ANY WARRANTY; without even the implied warranty of
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// MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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// GNU General Public License 2.0 for more details.
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// A copy of the GPL 2.0 should have been included with the program.
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// If not, see http://www.gnu.org/licenses/
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// Official git repository and contact information can be found at
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// https://github.com/hrydgard/ppsspp and http://www.ppsspp.org/.
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// Memory-mapped hardware registers, for kernel code that pokes the hardware directly (the firmware
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// modules the VSH boot runs). Each block of registers is a device covering an address range; the
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// interpreter sends an access there (Memory::IsMMIOAccess) to the device, or logs it as unhandled.
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#pragma once
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#include "Common/CommonTypes.h"
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class MIPSState;
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class PointerWrap;
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class MMIODevice {
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public:
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MMIODevice(const char *name, u32 base, u32 size) : name_(name), base_(base), size_(size) {}
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virtual ~MMIODevice() {}
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// offset is from the base. size is 1, 2 or 4. The CPU doing the access is passed for registers
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// that answer each CPU differently. Returns false for an access the device doesn't handle.
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virtual bool Read(MIPSState *mips, u32 offset, int size, u32 *value) = 0;
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virtual bool Write(MIPSState *mips, u32 offset, int size, u32 value) = 0;
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// To the power-on state.
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virtual void Reset() = 0;
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virtual void DoState(PointerWrap &p) = 0;
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const char *Name() const { return name_; }
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bool Contains(u32 address) const { return address - base_ < size_; }
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u32 Base() const { return base_; }
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private:
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const char *name_;
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u32 base_;
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u32 size_;
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};
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namespace MMIO {
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// What an unhandled read returns. Distinctive (not 0) so it's obvious in a live trace when some later
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// computation's input traces back to an unimplemented register, rather than looking like an
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// ordinary, legitimate zero.
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constexpr u32 UNHANDLED_READ = 0x1337BEEF;
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// Registers the devices, in their power-on state.
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void Init();
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void Shutdown();
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void DoState(PointerWrap &p);
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// For an address Memory::IsMMIOAccess() accepts, from kernel code (the caller checks). size is 1, 2
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// or 4. An access no device handles is logged, and reads as UNHANDLED_READ.
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u32 Read(MIPSState *mips, u32 address, int size);
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void Write(MIPSState *mips, u32 address, int size, u32 value);
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// A memory copy where either end may be hardware registers: kernel code copies Media Engine code
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// to the boot page at 0xBFC00000, which the main CPU reaches through MMIO. Byte by byte, and
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// backward where memmove would be. Returns false, having done nothing, if neither end is MMIO.
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bool Copy(MIPSState *mips, u32 destPtr, u32 srcPtr, u32 bytes);
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} // namespace MMIO
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