Files
ppsspp/Core/MemFault.cpp
T
Henrik RydgårdandClaude Opus 5.5 59b6b4de78 RISC-V and LoongArch64 IR JITs: Look up the block for a jump to a register at the jump
Like the ARM64 JIT (e33f38afa6), each jr and jalr does the dispatcher's
lookup itself, for an indirect branch of its own, and goes to the
dispatcher when out of downcount or with no block yet.

A bad target now faults in the block rather than at dispatchFetch, so the
fault handler takes any fault in the block shadow as a bad jump, with the
masked target from the address. That covers ARM64's too, which was handled
as a bad memory access.

Co-Authored-By: Claude Opus 5.5 (1M context) <noreply@anthropic.com>
2026-10-15 15:17:37 +02:00

347 lines
12 KiB
C++

// Copyright (C) 2020 PPSSPP Project
// This program is free software: you can redistribute it and/or modify
// it under the terms of the GNU General Public License as published by
// the Free Software Foundation, version 2.0 or later versions.
// This program is distributed in the hope that it will be useful,
// but WITHOUT ANY WARRANTY; without even the implied warranty of
// MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
// GNU General Public License 2.0 for more details.
// A copy of the GPL 2.0 should have been included with the program.
// If not, see http://www.gnu.org/licenses/
// Official git repository and contact information can be found at
// https://github.com/hrydgard/ppsspp and http://www.ppsspp.org/.
#include "ppsspp_config.h"
#include <cstdint>
#include <unordered_set>
#include <sstream>
#include "Common/StringUtils.h"
#include "Common/MachineContext.h"
#if PPSSPP_ARCH(AMD64) || PPSSPP_ARCH(X86)
#include "Common/x64Analyzer.h"
#elif PPSSPP_ARCH(ARM64)
#include "Core/Util/DisArm64.h"
#elif PPSSPP_ARCH(ARM)
#include "ext/disarm.h"
#elif PPSSPP_ARCH(RISCV64)
#include "ext/riscv-disas.h"
#elif PPSSPP_ARCH(LOONGARCH64)
#include "ext/loongarch-disasm.h"
#endif
#include "Common/Log.h"
#include "Core/Config.h"
#include "Core/Core.h"
#include "Core/MemFault.h"
#include "Core/MemMap.h"
#include "Core/MIPS/JitCommon/JitCommon.h"
#include "Core/Debugger/LineInfo.h"
#include "Core/Debugger/SymbolMap.h"
// Stack walking stuff
#include "Core/MIPS/MIPSStackWalk.h"
#include "Core/MIPS/MIPSDebugInterface.h"
#include "Core/HLE/sceKernelThread.h"
#include "Core/HLE/sceKernelModule.h"
namespace Memory {
static int64_t g_numReportedBadAccesses = 0;
const uint8_t *g_lastCrashAddress;
MemoryExceptionType g_lastMemoryExceptionType;
static bool inCrashHandler = false;
std::unordered_set<const uint8_t *> g_ignoredAddresses;
void MemFault_Init() {
g_numReportedBadAccesses = 0;
g_lastCrashAddress = nullptr;
g_lastMemoryExceptionType = MemoryExceptionType::NONE;
g_ignoredAddresses.clear();
}
bool MemFault_MayBeResumable() {
return g_lastCrashAddress != nullptr;
}
void MemFault_IgnoreLastCrash() {
g_ignoredAddresses.insert(g_lastCrashAddress);
}
#ifdef MACHINE_CONTEXT_SUPPORTED
static bool DisassembleNativeAt(const uint8_t *codePtr, int instructionSize, std::string *dest) {
#if PPSSPP_ARCH(AMD64) || PPSSPP_ARCH(X86)
auto lines = DisassembleX86(codePtr, instructionSize);
if (!lines.empty()) {
*dest = lines[0];
return true;
}
#elif PPSSPP_ARCH(ARM64)
auto lines = DisassembleArm64(codePtr, instructionSize);
if (!lines.empty()) {
*dest = lines[0];
return true;
}
#elif PPSSPP_ARCH(ARM)
auto lines = DisassembleArm2(codePtr, instructionSize);
if (!lines.empty()) {
*dest = lines[0];
return true;
}
#elif PPSSPP_ARCH(RISCV64)
auto lines = DisassembleRV64(codePtr, instructionSize);
if (!lines.empty()) {
*dest = lines[0];
return true;
}
#elif PPSSPP_ARCH(LOONGARCH64)
auto lines = DisassembleLA64(codePtr, instructionSize);
if (!lines.empty()) {
*dest = lines[0];
return true;
}
#endif
return false;
}
bool HandleFault(uintptr_t hostAddress, void *ctx) {
if (inCrashHandler)
return false;
inCrashHandler = true;
SContext *context = (SContext *)ctx;
const uint8_t *codePtr = (uint8_t *)(context->CTX_PC);
// We set this later if we think it can be resumed from.
g_lastCrashAddress = nullptr;
// TODO: Check that codePtr is within the current JIT space.
bool inJitSpace = MIPSComp::jit && MIPSComp::jit->CodeInRange(codePtr);
if (!inJitSpace) {
// This is a crash in non-jitted code. Not something we want to handle here, ignore.
// Actually, we could handle crashes from the IR interpreter here, although recovering the call stack
// might be tricky...
inCrashHandler = false;
return false;
}
uintptr_t baseAddress = (uintptr_t)base;
#ifdef MASKED_PSP_MEMORY
const uintptr_t addressSpaceSize = 0x40000000ULL;
#else
const uintptr_t addressSpaceSize = 0x100000000ULL;
#endif
// The dispatcher looks a jump target up in the block shadow, which faults where there's no PSP memory.
// The JITs also do that lookup inline at a jump to a register.
const uintptr_t shadowAddress = (uintptr_t)blockShadow;
const bool shadowFault = shadowAddress && hostAddress >= shadowAddress && hostAddress <= shadowAddress + BLOCK_SHADOW_MASK;
if (shadowFault) {
baseAddress = shadowAddress;
}
// Check whether hostAddress is within the PSP memory space, which (likely) means it was a guest executable that did the bad access.
bool invalidHostAddress = hostAddress == (uintptr_t)0xFFFFFFFFFFFFFFFFULL;
if (hostAddress < baseAddress || hostAddress >= baseAddress + addressSpaceSize) {
// Host address outside - this was a different kind of crash.
if (!invalidHostAddress) {
inCrashHandler = false;
return false;
}
}
// OK, a guest executable did a bad access. Let's handle it.
uint32_t guestAddress = invalidHostAddress ? 0xFFFFFFFFUL : (uint32_t)(hostAddress - baseAddress);
// TODO: Share the struct between the various analyzers, that will allow us to share most of
// the implementations here.
bool success = false;
MemoryExceptionType type = MemoryExceptionType::NONE;
int instructionSize = 4;
#if PPSSPP_ARCH(AMD64) || PPSSPP_ARCH(X86)
// X86, X86-64. Variable instruction size so need to analyze the mov instruction in detail.
instructionSize = 15;
// To ignore the access, we need to disassemble the instruction and modify context->CTX_PC
LSInstructionInfo info{};
success = X86AnalyzeMOV(codePtr, info);
if (success)
instructionSize = info.instructionSize;
#elif PPSSPP_ARCH(ARM64)
uint32_t word;
memcpy(&word, codePtr, 4);
// To ignore the access, we need to disassemble the instruction and modify context->CTX_PC
Arm64LSInstructionInfo info{};
success = Arm64AnalyzeLoadStore((uint64_t)codePtr, word, &info);
#elif PPSSPP_ARCH(ARM)
uint32_t word;
memcpy(&word, codePtr, 4);
// To ignore the access, we need to disassemble the instruction and modify context->CTX_PC
ArmLSInstructionInfo info{};
success = ArmAnalyzeLoadStore((uint32_t)codePtr, word, &info);
#elif PPSSPP_ARCH(RISCV64)
uint32_t word;
memcpy(&word, codePtr, 4);
// To ignore the access, we need to disassemble the instruction and modify context->CTX_PC
RiscVLSInstructionInfo info{};
success = RiscVAnalyzeLoadStore((uint64_t)codePtr, word, &info);
instructionSize = info.instructionSize;
#elif PPSSPP_ARCH(LOONGARCH64)
uint32_t word;
memcpy(&word, codePtr, 4);
// To ignore the access, we need to disassemble the instruction and modify context->CTX_PC
LoongArch64LSInstructionInfo info{};
success = LoongArch64AnalyzeLoadStore((uint64_t)codePtr, word, &info);
if (success)
instructionSize = info.instructionSize;
// It's quite pointless to ignore bad memory access on LoongArch because we could not handle it correctly.
success = false;
#endif
if (MIPSComp::jit && (shadowFault || MIPSComp::jit->IsAtDispatchFetch(codePtr))) {
// The shadow entry's offset is the target, masked.
u32 targetAddr = shadowFault ? guestAddress : currentMIPS->pc;
// TODO: Do the other archs and platforms.
#if PPSSPP_ARCH(AMD64) && PPSSPP_PLATFORM(WINDOWS)
// We know which register the address is in, look in Asm.cpp.
targetAddr = (uint32_t)context->Rax;
#endif
Core_ExecException(targetAddr, currentMIPS->pc, ExecExceptionType::JUMP);
// Redirect execution to a crash handler that will switch to CoreState::CORE_RUNTIME_ERROR immediately.
uintptr_t crashHandler = (uintptr_t)MIPSComp::jit->GetCrashHandler();
if (crashHandler != 0) {
context->CTX_PC = crashHandler;
ERROR_LOG(Log::MemMap, "Bad execution access detected, halting: %08x (last known pc %08x, host: %p)", targetAddr, currentMIPS->pc, (void *)hostAddress);
inCrashHandler = false;
return true;
}
type = MemoryExceptionType::UNKNOWN;
} else if (success) {
if (info.isMemoryWrite) {
type = MemoryExceptionType::WRITE_WORD;
} else {
type = MemoryExceptionType::READ_WORD;
}
} else {
type = MemoryExceptionType::UNKNOWN;
}
g_lastMemoryExceptionType = type;
bool handled = true;
if (success && (g_Config.bIgnoreBadMemAccess || g_ignoredAddresses.find(codePtr) != g_ignoredAddresses.end())) {
if (!info.isMemoryWrite) {
// It was a read. Fill the destination register with 0.
// TODO
}
// Move on to the next instruction. Note that handling bad accesses like this is pretty slow.
context->CTX_PC += info.instructionSize;
g_numReportedBadAccesses++;
if (g_numReportedBadAccesses < 100) {
std::string temp;
if (MIPSComp::jit && MIPSComp::jit->DescribeCodePtr(codePtr, temp)) {
ERROR_LOG(Log::MemMap, "Bad memory access detected and ignored: %08x (%p) at %s", guestAddress, (void *)hostAddress, temp.c_str());
} else {
ERROR_LOG(Log::MemMap, "Bad memory access detected and ignored: %08x (%p)", guestAddress, (void *)hostAddress);
}
}
} else {
std::string infoString = "";
std::string temp;
if (MIPSComp::jit && MIPSComp::jit->DescribeCodePtr(codePtr, temp)) {
infoString += temp + " ";
}
temp.clear();
if (DisassembleNativeAt(codePtr, instructionSize, &temp)) {
infoString += "(" + temp + ") ";
}
// Either bIgnoreBadMemAccess is off, or we failed recovery analysis.
// We can't ignore this memory access.
uint32_t approximatePC = currentMIPS->pc;
// TODO: Determine access size from the disassembled native instruction. We have some partial info already,
// just need to clean it up.
Core_MemoryException(guestAddress, info.OperandSizeInBytes(), approximatePC, type, infoString);
// There's a small chance we can resume from this type of crash.
g_lastCrashAddress = codePtr;
// Redirect execution to a crash handler that will switch to CoreState::CORE_RUNTIME_ERROR immediately.
uintptr_t crashHandler = 0;
if (MIPSComp::jit)
crashHandler = (uintptr_t)MIPSComp::jit->GetCrashHandler();
if (crashHandler != 0)
context->CTX_PC = crashHandler;
else
handled = false;
// ERROR_LOG(Log::MemMap, "Bad memory access detected! %08x (%p) Stopping emulation. Info:\n%s", guestAddress, (void *)hostAddress, infoString.c_str());
}
inCrashHandler = false;
return handled;
}
#else
bool HandleFault(uintptr_t hostAddress, void *ctx) {
ERROR_LOG(Log::MemMap, "Exception handling not supported");
return false;
}
#endif
} // namespace Memory
std::vector<MIPSStackWalk::StackFrame> WalkCurrentStack(int threadID, uint32_t startPC) {
DebugInterface *cpuDebug = currentDebugMIPS;
if (startPC == 0)
startPC = cpuDebug->GetPC();
auto threads = GetThreadsInfo();
uint32_t entry = startPC;
uint32_t stackTop = 0;
for (const DebugThreadInfo &th : threads) {
if ((threadID == -1 && th.isCurrent) || th.id == threadID) {
entry = th.entrypoint;
stackTop = th.initialStack;
break;
}
}
uint32_t ra = cpuDebug->GetRegValue(0, MIPS_REG_RA);
uint32_t sp = cpuDebug->GetRegValue(0, MIPS_REG_SP);
return MIPSStackWalk::Walk(startPC, ra, sp, entry, stackTop);
}
std::string FormatStackTrace(const std::vector<MIPSStackWalk::StackFrame> &frames) {
std::stringstream str;
for (const auto &frame : frames) {
const u32 frameEntry = frame.entry == 0xFFFFFFFF ? 0 : frame.entry;
std::string desc = g_symbolMap->GetDescription(frame.entry);
// Empty unless the game shipped an unstripped ELF - see Core/Debugger/LineInfo.h. A crash
// report is the single place this is worth the most, so it goes first on the line.
const std::string source = g_lineInfo.LookupString(frame.pc);
const std::string at = source.empty() ? std::string() : " at " + source;
char moduleDesc[96];
if (DescribeModuleAddress(frame.entry, moduleDesc, sizeof(moduleDesc))) {
str << StringFromFormat("%s%s [%s] (%08x+%03x, pc: %08x sp: %08x)\n", desc.c_str(), at.c_str(), moduleDesc, frameEntry, frame.pc - frameEntry, frame.pc, frame.sp);
} else {
str << StringFromFormat("%s%s (%08x+%03x, pc: %08x sp: %08x)\n", desc.c_str(), at.c_str(), frameEntry, frame.pc - frameEntry, frame.pc, frame.sp);
}
}
return str.str();
}