mirror of
https://github.com/hrydgard/ppsspp.git
synced 2026-10-21 02:09:05 +02:00
Henrik RydgårdandClaude Opus 5.5
53ac2c7c56
Kernel code's loads and stores may reach hardware registers, which only the interpreter handled, so the IR frontend sent every one of them (in kernel blocks, only run by the VSH boot) to it. They now become LoadKernel*/StoreKernel* IR ops (one per size, like the plain loads and stores), which check at run time whether the address is memory or a hardware register (MMIO). After constant propagation, ResolveKernelMemory turns the ones at a constant address that's plain memory into ordinary loads and stores, so only the hardware registers, and addresses only known at run time, stay checked. The native JITs run the two ops through their IR fallback. They're barriers, since a register access has side effects, but can't change the GPRs, so constants stay known across. The kernel mode check for MMIO moves to the interpreter, the only caller that can run user code there. TestMMIO covers the new paths and which accesses stay checked. Under --vsh, the JIT and the interpreter now make the same unhandled register accesses, in the same numbers. Co-Authored-By: Claude Opus 5.5 (1M context) <noreply@anthropic.com>
78 lines
2.2 KiB
C++
78 lines
2.2 KiB
C++
// Copyright (c) 2012- PPSSPP Project.
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// This program is free software: you can redistribute it and/or modify
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// it under the terms of the GNU General Public License as published by
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// the Free Software Foundation, version 2.0 or later versions.
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// This program is distributed in the hope that it will be useful,
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// but WITHOUT ANY WARRANTY; without even the implied warranty of
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// MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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// GNU General Public License 2.0 for more details.
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// A copy of the GPL 2.0 should have been included with the program.
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// If not, see http://www.gnu.org/licenses/
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// Official git repository and contact information can be found at
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// https://github.com/hrydgard/ppsspp and http://www.ppsspp.org/.
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#include <vector>
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#include "Common/Log.h"
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#include "Common/Serialize/Serializer.h"
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#include "Core/HW/GpioMMIO.h"
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#include "Core/HW/MMIO.h"
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#include "Core/MIPS/MIPS.h"
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namespace MMIO {
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static std::vector<MMIODevice *> g_devices;
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void Init() {
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g_devices = {
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GpioMMIO::Device(),
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SysconSerialMMIO::Device(),
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};
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for (MMIODevice *device : g_devices) {
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device->Reset();
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}
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}
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void Shutdown() {
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g_devices.clear();
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}
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void DoState(PointerWrap &p) {
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auto s = p.Section("MMIO", 1, 1);
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if (!s)
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return;
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// Every device, whether or not this boot registered it, so the layout doesn't depend on that.
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GpioMMIO::Device()->DoState(p);
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SysconSerialMMIO::Device()->DoState(p);
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}
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static MMIODevice *FindDevice(u32 address) {
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for (MMIODevice *device : g_devices) {
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if (device->Contains(address))
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return device;
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}
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return nullptr;
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}
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u32 Read(MIPSState *mips, u32 address, int size) {
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MMIODevice *device = FindDevice(address);
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u32 value;
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if (device && device->Read(mips, address - device->Base(), size, &value))
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return value;
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WARN_LOG(Log::CPU, "Unhandled MMIO Read%d at %08x%s%s", size * 8, address, device ? " in " : "", device ? device->Name() : "");
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return UNHANDLED_READ;
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}
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void Write(MIPSState *mips, u32 address, int size, u32 value) {
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MMIODevice *device = FindDevice(address);
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if (device && device->Write(mips, address - device->Base(), size, value))
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return;
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WARN_LOG(Log::CPU, "Unhandled MMIO Write%d at %08x = %08x%s%s", size * 8, address, value, device ? " in " : "", device ? device->Name() : "");
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}
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} // namespace MMIO
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