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ppsspp/Core/MIPS
Henrik RydgårdandClaude Fable 5.1 2c801b8a31 VFPU: vsrt1-4 order NaN, denormals and signed zero like the hardware
The same ordering as vmin/vmax (sign and magnitude, denormals compare as
zero), and on a tie vsrt1/2 keep the lower lane of each pair, vsrt3/4 the
upper one. Recorded in cpu/vfpu/specials.

Co-Authored-By: Claude Fable 5.1 <noreply@anthropic.com>
2026-09-22 14:10:22 -06:00
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