Unknown W. Brackets 17ffc9c261 arm64jit: Special case some shuffles. ...

To avoid 4 instruction shuffles.

2023-09-04 23:37:40 -07:00

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ARM

jit: Skip known prefix writes.

2023-08-22 23:26:31 -07:00

ARM64

arm64jit: Special case some shuffles.

2023-09-04 23:37:40 -07:00

fake

irjit: Implement ll/sc.

2023-07-29 17:57:44 -07:00

IR

irjit: Correct metadata on Vec2 packing ops.

2023-09-03 21:13:11 -07:00

JitCommon

arm64jit: Add initial base for IR jit.

2023-09-03 12:14:28 -07:00

MIPS

irjit: Implement ll/sc.

2023-07-29 17:57:44 -07:00

RiscV

Merge pull request #18061 from unknownbrackets/arm64-ir-jit

2023-09-04 10:02:24 +02:00

x86

arm64jit: Implement load/store in IR.

2023-09-04 00:04:36 -07:00

MIPS.cpp

x86jit: Improve some debug labels.

2023-08-27 12:51:29 -07:00

MIPS.h

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MIPSAnalyst.cpp

riscv: Spill registers more intelligently.

2023-07-30 14:24:12 -07:00

MIPSAnalyst.h

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MIPSAsm.cpp

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MIPSAsm.h

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MIPSCodeUtils.cpp

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MIPSCodeUtils.h

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MIPSDebugInterface.cpp

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MIPSDebugInterface.h

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MIPSDis.cpp

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MIPSDis.h

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MIPSDisVFPU.cpp

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MIPSDisVFPU.h

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MIPSInt.cpp

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MIPSInt.h

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MIPSIntVFPU.cpp

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MIPSIntVFPU.h

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MIPSStackWalk.cpp

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MIPSStackWalk.h

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MIPSTables.cpp

jit: Skip known prefix writes.

2023-08-22 23:26:31 -07:00

MIPSTables.h

jit: Skip known prefix writes.

2023-08-22 23:26:31 -07:00

MIPSVFPUFallbacks.cpp

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MIPSVFPUFallbacks.h

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MIPSVFPUUtils.cpp

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MIPSVFPUUtils.h

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