Henrik RydgårdandClaude Opus 5.5 88d6befc02 CPU: jr and jalr ignore the target's low two bits on the main CPU too ...

On a PSP, jr and jalr to an address with its low two bits set raise no
address error: they run from the aligned address, the PC keeps no low
bits, and jalr's link is unaffected (cpu/jump/unaligned, recorded on
firmware 6.61). This was done only for the Media Engine.

The firmware's PS1 emulator returns through such an address. The
interpreters stopped there with an invalid jump, and the JITs found the
block at the aligned address only if it was already compiled, and
otherwise compiled one at the unaligned address.

Co-Authored-By: Claude Opus 5.5 (1M context) <noreply@anthropic.com>

2026-10-23 14:23:39 +02:00

..

ARM

32-bit: Keep the memory view range reserved, and mask guest addresses to it

2026-10-20 23:21:11 +02:00

ARM64

ME: Let kernel code on the main CPU reach RAM and VRAM through kseg1

2026-10-21 12:50:46 +02:00

IR

CPU: jr and jalr ignore the target's low two bits on the main CPU too

2026-10-23 14:23:39 +02:00

JitCommon

ME: Run the Media Engine on the ARM64 and x64 JITs

2026-10-21 10:28:50 +02:00

LoongArch64

CPU: Give each MIPSState an address space for its memory accesses

2026-10-20 18:41:28 +02:00

RiscV

CPU: Give each MIPSState an address space for its memory accesses

2026-10-20 18:41:28 +02:00

x86

ME: Let kernel code on the main CPU reach RAM and VRAM through kseg1

2026-10-21 12:50:46 +02:00

Interpreter.cpp

CPU: jr and jalr ignore the target's low two bits on the main CPU too

2026-10-23 14:23:39 +02:00

Interpreter.h

ME: Let mcidclan's MIST restart Sony's ME firmware and run tasks

2026-10-21 12:06:12 +02:00

InterpreterDispatch.cpp

ME: Let mcidclan's MIST restart Sony's ME firmware and run tasks

2026-10-21 12:06:12 +02:00

InterpreterDispatch.h

Plumb an explicit MIPSState *mips through the interpreter's Int_* handlers

2026-08-12 14:02:19 +02:00

InterpreterVFPU.cpp

Memory: Give the Media Engine an address space of its own

2026-10-20 22:22:40 +02:00

InterpreterVFPU.h

Plumb an explicit MIPSState *mips through the interpreter's Int_* handlers

2026-08-12 14:02:19 +02:00

MeCore.cpp

POPS: Boot PS1 EBOOTs through the firmware's POPS manager

2026-10-21 13:15:30 +02:00

MeCore.h

POPS: Boot PS1 EBOOTs through the firmware's POPS manager

2026-10-21 13:15:30 +02:00

MIPS.cpp

CPU: Inline MIPSState::IsMediaEngine() and HasDefaultPrefix()

2026-10-21 10:28:50 +02:00

MIPS.h

CPU: Inline MIPSState::IsMediaEngine() and HasDefaultPrefix()

2026-10-21 10:28:50 +02:00

MIPSAnalyst.cpp

Zuma: Correct aiming algorithm to behave better with analog sticks

2026-10-22 19:31:54 +02:00

MIPSAnalyst.h

SaveState: Only rehash functions in code a load changed

2026-10-19 20:18:46 +02:00

MIPSAsm.cpp

Make instruction cache invalidation (for us, jit cache invalidation) clearer

2026-08-16 16:59:52 +02:00

MIPSAsm.h

Fix the API for MIPSAssembleOpcode to remove a global

2025-11-03 16:08:07 +01:00

MIPSCodeUtils.cpp

Keep JIT block entries and replacement hooks out of PSP memory

2026-10-11 10:33:30 +02:00

MIPSCodeUtils.h

Decode the unused bits of shifts and Allegrex bit ops as the PSP does

2026-10-14 10:56:48 +02:00

MIPSDebugInterface.cpp

Debugger: Show replacement hooks in the disassembly again

2026-10-11 10:33:30 +02:00

MIPSDebugInterface.h

Win32 debugger: stop cutting off register values in CtrlRegisterList

2026-09-12 13:46:12 -06:00

MIPSDis.cpp

Decode the unused bits of shifts and Allegrex bit ops as the PSP does

2026-10-14 10:56:48 +02:00

MIPSDis.h

Rename the replacement pseudo-op, drop the leftover emuhack defines

2026-10-11 10:33:30 +02:00

MIPSDisVFPU.cpp

VFPU: vrnds takes its seed from the vs field

2026-10-15 00:09:25 +02:00

MIPSDisVFPU.h

Improve debugger assemble/disassemble compatiblity

2026-07-07 20:30:51 -04:00

MIPSStackWalk.cpp

Stack walk: Don't take an early return for the end of the previous function

2026-10-19 11:10:47 +02:00

MIPSStackWalk.h

Show a MIPS stack trace on crash screen (#17211)

2023-03-31 10:08:12 +02:00

MIPSTables.cpp

ME: Let mcidclan's MIST restart Sony's ME firmware and run tasks

2026-10-21 12:06:12 +02:00

MIPSTables.h

CPU: Add the Media Engine core, off by default

2026-10-20 22:22:40 +02:00

MIPSTracer.cpp

IR JITs: Split the IR interpreter out, and keep IR to it

2026-10-20 12:09:16 +02:00

MIPSTracer.h

IR JITs: Split the IR interpreter out, and keep IR to it

2026-10-20 12:09:16 +02:00

MIPSVFPUUtils.cpp

CPU: Pass the MIPSState explicitly where it was already at hand

2026-10-20 09:47:48 +02:00

MIPSVFPUUtils.h

Debugger: Fix the Win32 VFPU window at high DPI, implement it in ImDebugger

2026-10-16 13:42:06 +02:00