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ppsspp/Core/MIPS/LoongArch64
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Henrik RydgårdandClaude Opus 5.5 c38d04a10c RISC-V/LoongArch IR: Get vrot's sine and cosine from one call 
Like arm64 and x64, call vfpu_sincos_packed and split the double it returns.

Co-Authored-By: Claude Opus 5.5 (1M context) <noreply@anthropic.com>
2026-09-24 16:22:41 -06:00
..
LoongArch64Asm.cpp
Add a MIPSState context pointer to the JitAt call
2026-09-21 17:34:10 -06:00
LoongArch64CompALU.cpp
LoongArch JIT: Compile min and max
2026-09-24 14:31:22 -06:00
LoongArch64CompBranch.cpp
loongarch: Add emitter, JIT and disassembler support for LoongArch64
2025-07-12 03:21:23 +08:00
LoongArch64CompFPU.cpp
RISC-V/LoongArch IR: Get vrot's sine and cosine from one call
2026-09-24 16:22:41 -06:00
LoongArch64CompLoadStore.cpp
loongarch: Add emitter, JIT and disassembler support for LoongArch64
2025-07-12 03:21:23 +08:00
LoongArch64CompSystem.cpp
Plumb through the PC value for syscalls, so we can get better diagnostics for unresolved ones.
2026-08-15 19:14:13 +02:00
LoongArch64CompVec.cpp
LoongArch JIT: Leave the Vec2 packs to the interpreter with LSX
2026-09-24 15:39:39 -06:00
LoongArch64Jit.cpp
Plumb through the PC value for syscalls, so we can get better diagnostics for unresolved ones.
2026-08-15 19:14:13 +02:00
LoongArch64Jit.h
IR: Fold ClampToZero into the 31-bit packs
2026-09-24 14:31:22 -06:00
LoongArch64RegCache.cpp
LoongArch JIT: Flush LSX vectors in F24-F31 before calls
2026-09-24 16:22:22 -06:00
LoongArch64RegCache.h
Document the LoongArch LSX lane trap and testing under qemu
2026-09-24 15:42:38 -06:00